Other Parts Discussed in Thread: TLV62585, TPS22965
For TPS65219 configurations that have GPO2 enabled (typically used to sequence an external 3.3 V load switch / supply), what is the state of that pin when the PMIC is in the 'OFF' or unpowered (VSYS = 0 V) state? Is it still held low? Since that signal is an open-collector output that requires a pullup (to VSYS as recommended by the documentation), I am concerned about it rising along with VSYS until the PMIC has turned on enough to control it (i.e., glitching) and therefore creating a race condition between the PMIC's undervoltage lockout (UVLO) and that of the power switch's / supply's and its associated enable ('EN') input.
Thanks!