• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 295 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCC28C54-Q1: Doesn't this device have OVP and OCP?

Thomas Nilsson
Prodigy 195 points
Part Number: UCC28C54-Q1
Other Parts Discussed in Thread: UCC28C54

Hi

I read the article on common mistakes in flyback power supplies (linked below) with great interest and took special notice about the OVP and OCP functionality.

Then I dove into the UCC28C54 datasheet just to find that there was not one word about these in there. However, leading edge blanking was mentioned, but not as a means to prevent OCP, "just" to desensitize the CS-pin.

Does the UCC28C54 not have OVP and OCP at all?

www.ti.com/.../slup392.pdf

  • +1
    TI__Guru 73215 points

    Hi,

    UCC28C54 does not have OVP. On the OCP, this device has a fixed max current threshold about 1.0V, when reach this threshold, the IC in cycle by cycle current limit. OVP and OCP need to use external circuit to achieve.

  • 0 in reply to Hong Huang
    Prodigy 195 points

    Ok - what might happen if there are spikes from the gate drive switching exceeding the 1V max limit, occuring on the CS-pin? 

    According to the data sheet the current output pulse is terminated within 35ns when the limit is reached, but I don't see this even though I can observe spikes above 1 volt, the pulse looks normal. However, consecutive pulses are sometimes missing, one or several, in a sporadic way.  But as I understand this should not be caused by gate drive spikes on the CS pin then?

  • 0 in reply to Thomas Nilsson
    TI__Guru 73215 points

    Hi,

    If the spikes magnitude last longer than the CS TO OUT delay then the OUT will be turned off. This requires so called leading edge blanking if a design cannot control the spikes magnitude low enough.

    70 ns is its maximum ie., the over 1V portion needs last more than 70ns pulse additional transition on RS flip flop and also that threshold can be as high as 1.1V