UCC5350-Q1: Capacitor size choose for Negative Bias curcuit used in SiC mos driving

Hi Arrow,

You need the series combination of these capacitors to be at least 20x the size of the input capacitance of the FET that is being driven. For example, IMZA75R020M1H has Ciss=2.2nF. C1 + series C2 be at least 44nF to drive this FET with this gate driver. 

In addition, if these capacitors are the same size, you will have start-up transient voltages that are centered around "signal emitter", not scaled to the values set by the resistors. You can avoid this problem by scaling the capacitor divider to the right DC value.

For a simple numerical example, say my target is >44nF in series, and my target voltages are -2V and +20V. My capacitor divider should be 1/21.

CA1 could be 47nF, and

CA2 could be 1uF

to satisfy both requirements. Their series combination would be 44.9nF, and their scaling would be .9/20, which is close enough for this purpose.

Best regards,

Sean