CSD19531Q5A: Sub circuit pin number definition

Hi John,

Deeply appreciate your response. While I am running the simulation for synchronous buck converter with CSD19531Q5A model on ltspice, simulation is running and getting stuck. But if I test it for asynchronous buck, the simulation is running.Do you know why this happens.

Thanks

Hi Cyril,

Some users have had convergence issues when simulating a switch mode power supply such as sync buck converter. I believe the problem is related to the tabulated capacitor subcircuit models. One way to get around this limitation is to use fixed capacitor values but this may affect the accuracy of the simulation. I'm not a LTSpice user. If you can share your schematic, I can try to simulate using TINA-TI.

Thanks,

John

Hi John,

Thanks for your reply. I have attached the schematic. Kindly look on to it.

Regards 

Cyril 

.synchronous buck using csd19531q5a.pdf

Hi Cyril,

Thanks for the schematic. Can you please explain the syntax for the voltage generators, V2 and V3, used to drive the gates of the FETs. If the rise and fall times are 1ns, you may want to slow that down. You can also try adding a small series gate resistor (1 - 5 ohms) for both FETs.

Thanks,

John

Hi John,

I have tried adding a series gate resistors, still it not working. Simulation is stuck at 5%.

While I tried to slow down the rise time and fall time(from 1ns to 0.1us), I am getting LTspice error message as shown in the screenshot below

Syntax for V2:

PULSE(0 10 0 0.2u 0.2u 3u 5.2u)

Syntax for V3:

PULSE(0 10 3.1u 0.2u 0.2u 1.9u 5.2u)

Best Regards, 

Cyril

Hi Cyril,

As I said in my earlier, I'm not very familiar with LTSpice. My guess is the problem has something to do with the tabulated capacitor subcircuits. I modified the attached model to use fixed capacitor values for Cgd and Cds (Cgs was a fixed value already). Please see if your simulation works with this model. I tried the model in a simple non-synchronous buck simulation and it works OK.

Thanks,

John

CSD19531Q5A_fixedC.lib

Hello Cyril,

Following up to see if the modified model worked in your simulation. Please let me know.

Thanks,

John

Hi John, 

It is not working with synchronous buck converter.

Regards,

Cyril

Hi Cyril.

I'm not sure if there is anything else I can do to help resolve your issue. Can you try to use a different FET in your simulation such as CSD17581Q5A, 30V NFET and reduce your input voltage to say 20V. The model for this device is simpler and does not include any tabulated subcircuit models.

Thanks,

John

Hi John,

Thanks for your support...

Regards,

Cyril