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Incorrect UCC28019 start up.

Other Parts Discussed in Thread: UCC28019, UCC28019A


I have a trouble with correct soft start of the PFC module based on UCC28019.

I used the standard schematic and here is my calculation table:

3326.PFC calc 110W.xls.

 All components that I actually used specified in this table (there few deviations, but no one in compensation circuits).

Choke made using Sendust ring (33x20x11mm, ue=125). Inductance is 2.1mH. Designed operating current is 2 Amps at approx 0.4T.


In all tests power source used - an isolated AC source, 220V 50 Hz. Load - ITECH IT8512B electronic load in Constant Wattage mode (110W). Current measurement - Agilent N2782A current probe. Oscilloscope - Rigol DS1102D. DC BIAS supply - an ATX computer power source, 12V line.


And here is my problem (1V == 1A):

There is no core saturation. In more close view I see nice current ramp with correctly limited current at the peak.

But it seems PCL is acting. Not a SOC. Why?

After startup PFC works fine at the maximum load and in full input voltage range (90..265VAC) with PF=0.99

I tried to change almost all components in the board, but none change has not led to positive results.

Also, I tried to use more powerful choke and decrease Rsense to 0.1 Ohm.


Please, tell me, what can I do to solve this problem...

  • The UCC28019 has an extra internal source current feature (typically about 150uA but this varies with different conditions) that becomes enabled when soft start is finished (when Vout reaches 95% of its nominal design point).  This extra source current is the EDR (Enhanced Dynamic Response).  This extra EDR goes through the VCOMP resistor to add voltage to the VCOMP level, driving VCOMP immediately high, allowing a much higher input current and temporarily distorting the input current waveform.  This high input current will force Vout to rise very quickly and the EDR will be removed and VCOMP will go down to its appropriate level...but the result was an initial spike in current.  This situation will occur every half cycle until the the bottom of the ripple voltage does not cross the 4.75V EDR threshold.  Adding more output capacitance to reduce the overall output ripple voltage will help shorten the duration of this event. 

    The EDR current is a feature that  makes the response time for transients much shorter which is a great benefit, but it also makes the input current look a little jumpy when Vout is near the 95% threshold.  This jumpiness is temporary and goes away when Vout ripple is all above 95%.  In fact, whenever the ripple voltage moves across the 95% threshold, either up or down, the EDR will go on or off, making the input current look distorted.  Because this extra current makes VCOMP move faster from its old level to its new level, the transient response is faster and the droop on Vout is smaller.

    The UCC28019A is a pin-for-pin compatible drop in replacement for the UCC28019 and it has a more linear gain change during start up so the input current is much less distorted.  The transient response is not quite as fast as the standard UCC28019 device but you may wish to compare this device in your application to determine if it suits you requirements. 

  • Okay, now I understand why it happens.

    Thank you for explanation and advices. Now I see in the datasheet explanation of the EDR feature. Seems the first time I did not read carefully :)

    I'll search the best way to resolve this issue.


    Best regards,


  • You really should try the A version of this device.  It may be exactly what you are looking for and there's no design or component changes required on the PCB so it's a simple drop in replacement.

  • You were absolutely right.

    Today I finally received few UCC28019A devices and solder it to the test board.

    Under lowest input voltage (90V) and maximum output load (110W) conditions device did correct and nice start-up, without any troubles.

     Thank you :)