BQ40Z80: BQ40Z80 design review

Hi Shubham,

Regarding the sent schematic, everything looks alright when compared to the bq40z80EVM. I would recommend adding spark gaps to the SCL/SDA lines, along with at the PACK connection to add another layer of ESD protection.

I believe that currently the only gauge that meets your requirements of 6s with integrated protections is the bq40z80.

Would it be possible to send the .gg file of the gauge settings so we can confirm the protections are set correctly?

Regards,

Anthony Baldino

Dear Sir,
Below I have attached the gg.csv file you can have a look for reference. I also want to ask one more thing which I came across during an observation while testing. When suppose, I am charging my battery pack and when any cell voltage exceeds COV parameters it corresponding COV flag set and BMS goes in shutdown mode , If am I right ?
To recover it from shut down mode, I am connecting pack + and pack - of my BMS to charger ( is it alright  to do these ?). Earlier my BMS was working according to these. But yesterday as my bms goes in shut down mode, it is not recovering from it means SCL and SDA lines are not communicating and BQ studio doesnt turn on.

Please have a look in to these and if there are also alternate ways are there to recover my bms from shutdown mode please suggest me.

Regards,
ShubhamNEW_1.gg.csv

Hi Shubham,

When the COV parameters are tripped, below are the set of actions that are supposed to occur:

As you said, the COV flag in SafetyStatus() is expected to be set, along with the CHG FET becoming disabled via the XCHG bit becoming set.

However, I am not sure that the gauge is immediately supposed to enter shutdown since it is not one of the listed actions from tripping the protection. There could be another shutdown condition that is occurring along with the Cell Overvoltage Protection. To figure out why shutdown might be occurring, I believe I would need a .log file of the gauge entering COV.

The actions below should allow the gauge to recover from the COV Protections:

Regards,

Anthony Baldino

Dear Sir,

The Gerber files have already been released and the boards are in production. We have seen eval board design in there there is no such spark gap component added but two conducting traces made in parallel for mitigating voltage sparks. As of now we cannot do in our boards. Can you suggest some alternate way of it i.e. is there any spark gaps based component available so we can send the part no and tell them to connect it to SDA & SCL lines wrt ground. And sir one more thing, I am attaching gerber files below please also review it and let me know if it is properly routed or some changes required in it.
OneDrive_2024-04-25.zip

Waiting for your reply,

Regards,
Shubham

Hi Shubham,

If possible, can you please send the schematic and board layout files (before the gerber release) for the board? This will allow us to have a better understanding when reviewing the design.

Regards,

Anthony Baldino 

Dear SIr,

Could you let me know what you mean by previous gerber release? We have previous revision files if you want that, we can provide them to you.

Regards,
Shubham

Hi Shubham,

Sorry for the confusion. I was asking for the schematic files and the layout file of the board (.PcbDoc type document if Altium is being used) since this will allow us to take a look at the layout as a whole.

Regards,

Anthony Baldino

Dear sir,

Please find the attached files below for your reference and let me know if you find anything improper. The below are schematic and layout files.
BMS.SchDocOGI_BMS.PcbDoc

Waiting for your response,

Regards,
Shubham

Hi Shubham,

Looking at the sent files, there is not much that directly stands out as improper since this design is very similar to the bq40z80EVM. The only difference I see is the difference of how the PDSG is done on the bq40z80 EVM compared to your design.

Regards,

Anthony Baldino