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BQ40Z50: PTC Permanent Failure Design Guidelines

Nate Martin
Prodigy 220 points
Part Number: BQ40Z50

Hello,

I am using the BQ40Z50 and am wondering what the correct use of the PTC pin is.

My understanding is this would be an over temperature permanent failure (reset on POR of the cells), and that it should be placed as close to the switching fets as possible. Given this, what considerations should go into choosing a failure temperature, and how would I spec the PTC its self to achieve triggering at said temperature?

In the example schematic for the bq40z50EVM a 10k chip resistor is placed where the PTC resistor would go. My assumption is this is to disable the function even though in the same circuit, the PTC enable pin is pulled high?

Is there any benefit in not using this function other then less/cheaper components? Lower quiescent current?

Thank you for your help,

Nate

  • 0
    Prodigy 220 points

    Sorry, this question is in regards to the BQ40Z50-R2. Not the older BQ40Z50.

  • +1 in reply to Nate Martin
    TI__Mastermind 28450 points

    Hi Nate,

    Nate Martin said:
    My understanding is this would be an over temperature permanent failure (reset on POR of the cells), and that it should be placed as close to the switching fets as possible. Given this, what considerations should go into choosing a failure temperature, and how would I spec the PTC its self to achieve triggering at said temperature?

    Your understanding is correct, this component should be placed as close to the switching fets as possible. When it comes to choosing which thermistor to implement, I believe that it needs to fall into this trip voltage below when the desired temperature is reached:

    Nate Martin said:
    In the example schematic for the bq40z50EVM a 10k chip resistor is placed where the PTC resistor would go. My assumption is this is to disable the function even though in the same circuit, the PTC enable pin is pulled high?

    I believe this is there to allow for testing if needed, since the user can swap this part out for a thermistor, but disabling it for the time being. If this is desired to be disabled in design, both PTC and PTCEN should be routed to VSS.

    Regards,

    Anthony Baldino

  • 0 in reply to Anthony
    Prodigy 220 points

    Thank you for the clarification Anthony.