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LP8764-Q1: BUCK1_PG not correctly coming up

Part Number: LP8764-Q1

I am trying to get the NVM configured for setting GPIO2 when BUCK1_PG is good. Currently this is not working properly, and seemssample_template.txt to come up before VOUT has reached the correct voltage. I have attached the JSON file (but renamed .txt),. Please can someone help me:

I have the following code in the assembly, with the intention: when BUCK1_PG is high -> set GPIO2, otherwise set GPIO2=0 after a timeout of 6ms.

ENABLE:
REG_WRITE_VCTRL_IMM REGULATOR=BUCK1 VCTRL=0x01 MASK=0xFE DELAY_MODE=ALWAYS DELAY=0us
WAIT COND=BUCK1_PG TYPE=HIGH TIMEOUT=6.55ms DEST=TIMEOUT
REG_WRITE_MASK_IMM ADDR=0x3D DATA=0x02 MASK=0xFD
TRIG_MASK 0xFFFFFB5
END
TIMEOUT:
REG_WRITE_MASK_IMM ADDR=0x3D DATA=0x00 MASK=0xFD
TRIG_MASK 0xFFFFFB5
END

I am using  LP876411B5-Q1 with a custom NVM.

  • Hi Alleyn,

    Thanks for reaching out. For better understanding can provide below information.

    Currently this is not working properly

    1. Can you provide scope shots enabling us to see what is happening?

    Another question that since device has PGOODs available ( either in GPIO1,6 or 9) then why did you not use any of those?

    BR,

    Ishtiaque

  • Hi Ishtiaque,

    Thanks for the reply.

    Regarding your question: I have 3 different configurations of the LP87644, so I needed to have 2 different PGOODs from the chip. For config 2 below: I need to have EN1 (GPIO1) enable the 1V8 rail and then I monitor PGOOD from just 1V8, then I enable 1V2 and monitor PGOOD  from just the 1V2. So my assumption was it was easier to implement this in the FSM and just states, as there is only 1 PGOOD.

    - Config 1: 4 phase 0V8 rail, Config 2: 1 phase 1V8 (comes up first), 3 phase 1V2 (comes up second), and 2 phase 1v0 (comes up first), 2 phase 1v2 (comes up second).

    I am currently testing just config 1 which only has 1 output so for this one I could have just used PGOOD, but I need the other ones working too. I am currently just testing config 1. I have also added PGOOD output on GPIO6 now to the NVM config, and it also isn't behaving correctly.

    Here is the plot:

    - I single trigger on VOUT1: which comes up as expected, but GPIO2 is turned on before VOUT1 is high. I have modified the json file to bring PGOOD out to GPIO6 for analysis, but PGOOD is always high. I have included the .json as a .txt file for you to look at:

    Note: It makes sense that GPIO2 would immediately go high, if PGOOD internally was always GOOD, so maybe there is a register that not set correctly. If you help me to first get PGOOD working properly (on GPIO6), we can progress from there.

    These changes are done:

    GPIO6_OD=0x1

    GPIO6_DIR=0x1
    GPIO6_SEL=0x3
    GPIO6_PU_SEL=0x1
    GPIO6_PU_PD_EN=0x0
    GPIO6_DEGLITCH_EN=0x0
    GPIO6_OUT=0x0

    3566.sample_template.txt

    Thanks,

    Alleyn

  • Hi Alleyn,

    I think issue is that you haven't enabled BUCKx_VMON bit when BUCK is enabled. This bit has to be set as well. And same bit has to be zeroed when shutting down. With this i expect GPIO2 will go high after BUCK is on valid window. 

    Br, Jari

  • Hi Jari,

    Thanks for the reply, this has resolved the problem with GPIO2 on my first config. I will now develop and test the other configs. PGOOD also responds now.

    Thanks,

    Alleyn

  • Hi Alleyn,

    Excellent news. Please share if you manage to resolve another config as well so will close thread after confirmation.

    Br, Jari

  • Hi Jari,

    I have another minor issue: see plot showing GPIO1 (1), GPIO2 (2) and VOUT (BUCK_1_2_3_4). I am getting spurious activity on the GPIOs, prior to the rails being enabled. You can see after I enable GPIO1 (offscreen), just before the VOUT starts to ramp. There is a 34us pulse on GPIO1 and GPIO2. These occur every ~210ms, and the pulses stop after VOUT has been enabled. Is there anything that can be causing this?

    I have also added the latest start machine (.txt):

    8308.sample_template.txt

    Thanks,

    Alleyn

  • Hi Alleyn,

    Not sure what exactly is causing this behavior but we have identified some updates that should be done.

    For example, if you change the following triggers to normal instead of immediate.

    And update the Enable sequence with Jump instead of END as following. 

    Let's see if you still get the same behavior. 

    BR,

    Ishtiaque

  • Thanks Ishtiaque,

    I modified that but also change BUCK1_VMON_EN=LOW in the ACTIVE state when disabling BUCK1 before GPIO1 is set high. This seems to resolve the spurious toggling issue. BUCK1_VNMON_EN is only set high when I turn on the BUCK1 in the ENABLE state.

    I will now look at Config2 and Config3, and let you know if I have any issues.

    Regards,

    Alleyn

  • Hi Alleyn,

    Good to hear that it seems to resolve your issue. So for now I am going to put this thread on wait status but do let me know if you do not have anything further so that I can close the thread. 

    BR,

    Ishtiaque