TPS92520-Q1: An LED open circuit fault CASE3

Hello Qinlei,

1)  That is due to FET inside our part.

2)  When you hit either HS ILIM or LS ILIM you are turned off for the duration of t_OC (over current retry time).  That time is enough to have the bootstrap capacitor to be discharged below the BSTUV threshold of the device and the LS FET has to be turned on prior to retrying, but it trips the BST UV fault and sets the bit.  

3)  Yes, once LS ILIM even occurs both LS and HS FETs are turned off and the COMP capacitor is discharged so that the next time it tries to turn on it does a soft start.  

4)  What do you mean by UVLO?  Are you talking about the external resistor divider on the UDIM pin??? or do you mean the BST UV which is a kind of UVLO for turning on the HS FET?  I am assuming that is what you mean. BST UV is triggered if you don't have a large enough boot strap capacitor such that the voltage on the bootstrap capacitor is above the BSTUV threshold.  The longer the off time of the PWM the lower the voltage drops across the bootstrap capacitor due to leakage.  I generally tell people to oversize the bootstrap capacitor to avoid having BST UV being triggered.  Case 3 Open Circuit happens because of ILIM event.  Once this happens, you have a Toc for a pretty long time and you also have a forced softstart which actually causes the LS FET to be turned on for a really long time.  In an open circuit the output voltage goes to almost the input voltage, When the output capacitance is large the bootstrap capacitor is discharged alot, and there is a soft start where the LS FET is turned on for a long time during the soft start.  That means the LS FET sees the current to charge the bootstrap capacitor while at the same time it discharged the output.  If the current to do that is too large it hits the LS ILIM.  

6)  That depends on the capacitance used and the condition.  If the off time is too long and the capacitor is too small then you will trigger the BST UV condition and that will set the BSTUV bit and it will force the LS FET to turn on to recharge the bootstrap capacitor before turning on the HS FET and starting up normally.    

Use this algorithm to detect and open circuit:

1/f_PWM is the period T_PWM of the PWM cycle so that is the worst case off time.  

This equation only accounts for the leakage from BST pin to SW, there is another path that isn't included in the datasheet because we can't measure it.  That leakage path is from BST to GND, inside the part.  If you use the table you should be fine.  

-fhoude

1)  The diagram isn't correct, trust the waveforms.

2)  Just follow the flow diagram.  What don't you understand?  Be specific.  

-fhoude