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ULN2003AI: Current Levels

Kara Haynes
Prodigy 570 points

Part Number: ULN2003AI

Hi there!

  • Figure 5-5 states that with all 7 gates conducting at 100% duty cycle simultaneously, we would have a maximum collector current of only ~110mA.
    • Below are the currents we are sinking:
      • In total, we sink 135mA (these signals will be at 100% duty cycle).

Question 1) Would the above current levels give rise to a failure, specifically on pin 10? If so, would it be pin 10 because of Figure 5-5, and being that this pin has the largest current? Or is this, maybe, because this pin is the last gate in the array?

Question 2) Is there information you can provide related to Vce vs temperature?

  • 0
    TI__Mastermind 36560 points

    Hi Kara,

    1. Figure 5-5 refers to the amount each individual channel can sink, not total current the device is sinking across all channels, so operating as per the diagram is ok.

    2. Vce(sat) mainly varies with respect to collector current, so that is a better indicator. However, this spec in the data sheet covers full operating temp as well.

    Thanks,

    Patrick