LM5050-1-Q1: LDO OR'ing Vs Buck OR'ing

Yassine Damoh

Part Number: LM5050-1-Q1
Other Parts Discussed in Thread: LM5050-1

Hello,

We are interested in using the LM5050-1 for power supply redundancy ( 10V, 5V, 3.3V and 1.2V). and after testing the evaluation board, I have the following concerns/Questions :

Reverse Source-Drain threshold voltage : -41mV to -16mV.

The thing that we observed in the past when using two TPS25940AQRVCRQ1 to connect two buck regulators with close set points, whichever buck is outputting first, the voltage will force itself to the FB pin of the other buck. and during switchover the second buck fails to regulate as it's already seeing the target voltage at the FB pin.

For voltage lower than 5V, the plan was to use 10V to supply the VS pin. What I observed was even if the Vin is disconnected, the MOSFET is driven high at power up. is that expected ?
for the common rail capacitor, is there any consideration to use ceramic caps instead of electrolytic (used in the eval board)

Is there a way to avoid regulation cross talk without the use of schottkies ?

Thanks,

Yassine

over 1 year ago

0 Shiven Dhir over 1 year ago

TI__Mastermind 46170 points

Hi Yassine,

Welcome to E2E!

1. If the VIN of both the Oring Controllers are very close, you should be seeing that the GATEs of both of them high, otherwise whichever is higher will power up the entire load. And when the higher voltage power supply fails for any reason, switch-over should happen smoothly with ideal-diode. Isn't this what you see?

2. Do you mean that when you apply 10V at VS and VIN is floating, the VGS was high?

3. You can use electrolytic caps as well.

Regards,

Shiven Dhir

0 Yassine Damoh over 1 year ago in reply to Shiven Dhir

Prodigy 205 points

Hi Shiven,

Thanks for the prompt reply.

1. I'm testing now using bench power supplies and two eval boards. but the issue issue with regulation cross talk was observed on other project. and since I'm seeing the common rail voltage on the Vin of the disconnected/floating rails, I'm worried that we will have the same issue when OR'ing two buck regulators using LM5050-1.

2. Yes, VGS is high at power up

3. the question was about using ceramic caps. The simulation shows some undesirable voltage dips during switch over.

Regards,

Yassine

0 Shiven Dhir over 1 year ago in reply to Yassine Damoh

TI__Mastermind 46170 points

Hi Yassine,

Can you share VGS high results.

Sorry I meant you can use ceramic caps as well. Electrolytic was used in eval board because high value ceramic caps are not ideal. If COUT is small, MLCCs are fine.

Can you share simulation results?

Regards,

Shiven Dhir

0 Yassine Damoh over 1 year ago in reply to Shiven Dhir

Prodigy 205 points

Hi Shiven,

Turn On :

Pre-condition : Source 1 is connected to 1.2V, Source 2 is disconnected, Vs is low.

Green : connected to Vin of the first eval board

Blue : common Output

Yellow : Connected to Vin of the second eval board

Red : Gate voltage of the second eval board

Pink : Gate to source voltage

the transition occurs when enabling the VS power supply set to 10V

Turn Off : (only occurs if Vs is disconnected)

For the simulation results, the following parameters seem to be the driving factors parameters (FET gate charge, Vgs Thresold, and Capacitor ESR) - the dips worsen in certain current and voltage scenarios.

Simulated circuit :

Using BUK6D16_13E

Using RSQ045N03HZG

Any feedback on the regulation concern ?

Thanks,

Yassine

0 Shiven Dhir over 1 year ago in reply to Yassine Damoh

TI__Mastermind 46170 points

Hi Yassine,

When input is floating and VS is powered up in LM5050-1, we have a known issue here. Please go through the FAQ mentioned below.

(11) [FAQ] LM5050-1: LM5050-1 Leakage Current - Power management forum - Power management - TI E2E support forums

Regarding change in gate voltage, the controller is working fine. That dip is dependent on factors like transconductance of the FETs used, threshold voltage of the FETs and RDS of the FETs. Please go through the FAQ mentioned once.

(+) [FAQ]: Ideal Diode Controller or ORing Controller gate voltage is lower than expected - Power management forum - Power management - TI E2E support forums

Please see at the scope-shot on the bench. The dip is expected.

Regards,

Shiven Dhir

0 Yassine Damoh over 1 year ago in reply to Shiven Dhir

Prodigy 205 points

Thanks Shiven,

Is there any risk that the reverse current flow will affect the working the OR'ing of two identical buck regs with the same set point ? as previously described ?

regards,

Yassine

0 Shiven Dhir over 1 year ago in reply to Yassine Damoh

TI__Mastermind 46170 points

Hi Yassine,

I am unsure if buck regs allow flow of reverse current. If they do not, buck might get damaged.

From ORing perspective, once VIN2 is powered up, there is no concern.

Regards,

Shiven Dhir