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TPS6594-Q1: TPS65941213RWERQ1 Abnormal close output

林君 郭
Prodigy 50 points
Part Number: TPS6594-Q1
Other Parts Discussed in Thread: TDA4VM

Hello, TI

         Our plan is TDA4VM+TPS65941213+TPS65941111，refer to PDN-0C for design

        We produced 10 boards, two of which had abnormal output shutdown of TPS65941213, resulting in sudden abnormal power off of the boards。

       Will TPS6594 communicate with TDA4 before shutting down? Will it send a message before it shuts down? If an abnormal message is sent, how can we view this message？ please help

  • 0
    TI__Mastermind 25385 points

    When a fault/interrupt happens, the PMIC will notify the SoC using the nINT pin. The PMIC will not shut down for all interrupt or faults, the PDN-0C user guide lists which events cause shutdowns or recovery attempts. 

    If you have access to the I2C lines and an I2C debugger tool, you can read the interrupt registers of the PMIC to determine what caused the shutdown. 

    e2e.ti.com/.../faq-tps6594-q1-lp8764-q1-debugging-pmic-behavior-with-interrupt-interpretation

  • 0 in reply to Michael Gambrill
    Prodigy 50 points

    Hello,

            I tried to switch to the I2C debugger tool when the board was abnormally powered down, but could not establish a communication connection with the TPS6594.
            If it is working properly, you can switch to the I2C debugger tool to read the value in the register

            How can I determine the cause of an abnormal power failure? I need your help

  • 0 in reply to 林君 郭
    TI__Mastermind 25385 points

    Questions:

    1. How long after initial boot before PMICs shutdown?

    2. Are the PMICs executing any recovery attempts or just before staying powered down?

    3. Using the nINT pin as a trigger, can you monitor PMIC output rails to see if any have any abnormal behavior before shutdown?

  • 0 in reply to Michael Gambrill
    Prodigy 50 points

    Hello,

    1、The abnormal power failure time of each pcb is not the same, generally within 2 hours

    2、When the PMIC is powered off abnormally, the debugging serial port does not have any output

    3、When PMIC abnormally power down, oscilloscope did not catch any changes in nINT

    I modified the value of the PMIC register to ±100mV for all BUCK and LDO PG_WINDOW. Then I did a durability test and the abnormal power failure did not happen again。

    My question is whether changing the PG_WINDOW value to ±100mV will cause other unknown failures, and whether it can be used as a solution to this problem

  • 0 in reply to 林君 郭
    TI__Mastermind 25385 points
    林君 郭 said:
    3、When PMIC abnormally power down, oscilloscope did not catch any changes in nINT

    Do you mean that nINT stays high the entire time? Under normal operation, if the interrupts are handled correctly after initialization, nINT should be high. Any fault that triggers a shut down should cause nINT to go low first.

    林君 郭 said:

    I modified the value of the PMIC register to ±100mV for all BUCK and LDO PG_WINDOW. Then I did a durability test and the abnormal power failure did not happen again。

    My question is whether changing the PG_WINDOW value to ±100mV will cause other unknown failures, and whether it can be used as a solution to this problem

    Widening a all of the PG_WINDOWs is a good debugging step, but it is not a solution to the problem. Widening some values while not adjusting others will allow you to narrow down which rail is having a problem.