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TPS3430-Q1: Questions about pin connection

Grey Guo
Intellectual 2420 points
Part Number: TPS3430-Q1

Tool/software:

Hi team,

My customer has 2 questions regarding TPS3430-Q1's pin connection, can you help advise?

1. Are the SET0 and SET1 pins open-drain outputs? Do they need to have pull-up resistors when connected to a high level?

2. Does the CAP control module inside the chip identify resistors and capacitors through pin voltage? How does it identify them specifically?

Regards

Grey

  • 0
    TI__Genius 9880 points

    Hi Grey, 

    Thanks for your question!

    - SET0 and SET1 are inputs pins and don't need a resistor to connect to VDD. 

    - I need to check with my team on this. Meanwhile can you please let me know why you need this information? Are you having any issue with  identifying resistors and capacitors. 

     Best,

    Sila Atalar

  • 0 in reply to Sila Atalar
    TI__Intellectual 2420 points

    Hi Sila,

    Thanks for support!

    - Can it be understood that the SET0 pin is High-Z?

    - The question was from a R&D engineer of the customer. I will check with him to see if he is having trouble or if he is just curious about how the resistors and capacitors are identified.

    Regards,

    Grey

  • 0 in reply to Sila Atalar
    TI__Intellectual 2420 points

    Hi Sila,

    The customer has replied.

    He wants to confirm whether external interference will affect the recognition of the capacitor or resistor, and whether it is necessary to place additional decoupling capacitors close to the pin. Hence he needs to figure out how the the capacitor or resistor is identified.

    Regards,

    Grey

  • 0 in reply to Grey Guo
    TI__Genius 9880 points

    Hi Ray,

    The external circuitry determines the the watchdog period. Please look at section 8.1.2 CWD Functionality to get more information. We provide a table shows the watchdog timing for the different SET0 SET1 and CWD configurations. No external decoupling capacitor is needed for this pin. 

    CWD pin has three options for setting the the watchdog window: connecting a capacitor to the CWD pin, connecting a pull-up resistor to VDD, and leaving the CWD pin unconnected.

    - Connecting a pull up resistor to VDD and leaving the pin open will give you the Factory-Programmed Watchdog Timing options, and by using SET0 and SET1 pins you have the option of either disable the watchdog or change the timing ratio. 

    I hope this helps! Please let me know if you have more question.

    Best,

    Sila