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UCC5350: UCC5350M miller clamp function question

Part Number: UCC5350

Tool/software:

Dear IFXer,

We planning design the SiC MOSFET C3M0032120K and UCC5350M in half bridge. and my question is:


1. I realize the Vth.min of SiC MOSFET is 1.5V and VCLAMP-TH of 5350M is 2.1V. There have any risk when parasitic turn on in half bridge?

2. if we using the MC function so we can remove negative voltage for turn off, just using the 0V?

  • Hi Kuo,

    1. The Vclamp=2V means that when CLAMP senses a voltage below 2V, the CLAMP pin will connect internally to VSS with a low-impedance. It engages when the falling edge of V(OUT) crosses 2V. On the falling edge, the CLAMP action will quickly drain the remaining voltage to VSS=0V. Later, if there is a Miller injection, CLAMP will maintain this low impedance between CLAMP and VSS. This low impedance is a good countermeasure to prevent Vgs from reaching Vth=1.5V. However, layout inductance is often the dominant impedance, and a high frequency Miller current injection will see a high impedance if the external loop length between the FET gate, CLAMP,  VSS, and source is long. 

    2. Yes, you should be able to use the Miller clamp alone to address Miller charge. V(miller)=VSS+I(miller)*Z. Keeping the impedance Z low is usually more important than shifting the VSS down to minimize V(miller) for a given I(miller).

    Best regards,

    Sean

  • Dear Sean,

    Thank you! further question is MC pin release based on input IN+ signal and VSENSE cross 2V to ensure Vg with low impedance, right?

  • Hi Kuo,

    The rising edge of the input will disable the Miller clamp. There is a small internal dead-time, and the Miller clamp and pull down network will open <10ns before OUT starts to rise.

    Best regards,

    Sean