Tool/software:
Dear Expert
The issue with the UC2846DWTR chip is: a repair machine with a half bridge TOP circuit, burning half bridge MOS. Testing has found that the open loop duty cycle of the upper and lower tubes is asymmetric, with 57% for the upper MOSFET and 43% for the lower MOSFET, and there is no dead zone. May I ask under what circumstances does this happen.
Below is sch ;