Tool/software:
Hello TI Support Team,
In the datasheet of "TPS2H160-Q1", there's a proposed layout for the case where there's a GND Network.
The following picture was taken from the datasheet:
The line on the top right corner indicates a connection to the rest of the GND plane. Does that line represent a trace, a resistor, or a capacitor?
Also would the second layer underneath this IC(GND Layer) also have a cutout?
As a general rule with such ICs, would it be ok/adviceable to connect the DAP to the Board GND and the GND pin to the "GND Network"? How would the performance of this IC be under EMC validation when comparing the case with and without a GND Network?
Thank you in advance,
Nuri