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UCC5871-Q1: question about power rail detection and recovery

Jay wang
Expert 3211 points
Part Number: UCC5871-Q1

Tool/software:

hi expert

taking UVLO of VCC2 fault as an example, assuming a situation(VCC2 UVLO fault is masked, don't report to NFLT1 ). at the beginning of power up, VCC2 is ok and normal, during UCC5871 working, VCC2 UVLO is trigger. As we know,STATUS3[UVLO2_FAULT] is asserted to 1, BUT driver output is NO action(becasue VCC2 UVLO is masked).

my question is that if VCC2 recovery from abnormal to normal, does UCC5871 can work normally again? can STATUS3[UVLO2_FAULT] be set to 0? or designer need to re-configurate 5871 again?

  • 0
    TI__Expert 5921 points

    Hi Jay,

    If the UVLO event does not cause the gate driver to reset (VCC2 < ~8V) then recovery can be achieved without reconfiguration.

    If the UVLO event causes a reset the driver must be reconfigured.

    A couple options to check for a reset:

    1. If internal VREF is used and enabled during normal operation, if the gate driver is reset it will drop, causing an ADC fault, which would indicate that the secondary side needs to be reconfigured when combined with a UVLO2 fault.

    2. If the CLK_MON fault occurs, this also indicates that the secondary die has reset.

    For the most robust system, we recommend either providing a reliable VCC2 rail to prevent UVLO faults, or reconfiguring the gate driver after a UVLO event.

    Regards,

    Daniel Norwood

  • 0 in reply to Daniel Norwood
    TI__Expert 3211 points

    hi Daniel

    Daniel Norwood said:
    If the UVLO event does not cause the gate driver to reset (VCC2 < ~8V) then recovery can be achieved without reconfiguration.

    [Q1]does "reset" you mention mean "reset mode"?

    [Q2] i remember MIN value of VCC2 UVLO threshold is 9V(turn off),10V(turn). from my understanding, if VCC2 is less than this values,UVLO2_FAULT] is asserted. 

    Daniel Norwood said:
    (VCC2 < ~8V)

    do you mean when VCC2 is more than 8V, UVLO2_FAULT] will be asserted , BUT 5871 don't go into reset mode, so designer don't need to re-configurate 5871?

  • 0 in reply to Jay wang
    TI__Expert 5921 points

    Hi Jay,

    Jay wang said:
    [Q1]does "reset" you mention mean "reset mode"?

    Yes, but more specifically the effect when the driver is reset is that all register settings on the secondary side return to default.

    Jay wang said:
    do you mean when VCC2 is more than 8V, UVLO2_FAULT] will be asserted , BUT 5871 don't go into reset mode, so designer don't need to re-configurate 5871?

    Correct, but we do not guarantee any operation beyond the minimum UVLO of 8V, which is why reconfiguration is recommended if VCC2 is not reliable. See table 7-1 in the datasheet.

    Regards,

    Daniel

  • 0 in reply to Daniel Norwood
    TI__Expert 3211 points

    ok Daniel got it thanks