Tool/software:
Hi,
In the event of a hardware fault within a GPIO or PCB track, connector etc we want to understand if it is possible to set the logic within the UCC5880-Q1 to ignore or overwrite Gate Drive Strength in accordance with an SPI setting.
This is because while GD0,1,2 is fast acting and readily synchronised across multiple gate drivers this hardware sub-system could fault and we need ability to induce a limp-home capability.
I reviewed the EVM manual and datasheet but didn't see notes on this. Apologies if it does exist in the documentation.
Thanks,
John
PS. I do fully appreciate that the settings on the pins can be physically set to ground to direct the IC to use SPI settings but wanted to know if there is any other lockout strategies available.
