This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Tool/software:
Dear Sir:
I downloaded TPS7A40001.LIB LT Spice model from TI site.
Model has an extra "Bias" pin that actual IC does not have. What should I connect Bias pin to in pSpice simulation?
Thanks. //Leo
Hi Leo,
I've looked at all of the models that are published on the TPS7A4001-EP product page, and I'm not seeing a Bias pin on any of them. Can you post a screenshot of what you're seeing?
Regards,
Nick
Hi Nick,
Thanks for the reply. Within the model, there are two parts, TPS7A4001 has an extra "PWPD" pin (I verified the pin is active).
.SUBCKT TPS7A4001 OUT GND IN EN FB PWPD
X1 OUT GND IN IN EN FB LDO_BASIC
+ PARAMS:
+ rinp = 1.000e+7
+ rout = 5.000e-1
+ psrr = 5.623e-4
+ pole = 3.000e+2
+ zero = 1.000e+4
+ venb = 4.000e-1
+ ehys = 1.000e-1
+ uvlo = 7.000e+0
+ uhys = 1.000e-1
+ vref = 1.173e+0
+ drop = 5.000e-1
+ ilim = 1.280e-1
+ ttrn = 1.000e-4
R6 PWPD GND 10MEG
.ENDS TPS7A4001
Also, there is a LDO_basic model contains "bias" pin. It is also an active pin.
.SUBCKT ldo_basic out vgnd vin bias enb fbk
+ PARAMS:
+ rinp = 1e07
+ rout = 0.1
+ psrr = 5e-4
+ pole = 100
+ zero = 10e3
+ venb = 1.0
+ ehys = 0.1
+ uvlo = 2.0
+ uhys = 0.1
+ vref = 1.20
+ drop = 0.25
+ ilim = 0.10
+ ttrn = 1e-4
R00 vin vxx { rinp }
C00 vin vxx { 1/(6.28*rinp*pole) }
EX1 vx1 0 VALUE {IF(V(enb, vgnd) + V(egd)*ehys > venb, 1, 0)}
RX1 vx1 egd 10
CX1 egd 0 1n
EX2 vx2 0 VALUE {IF(V(bias, vgnd) + V(vgd)*uhys > uvlo, 1, 0)}
RX2 vx2 vgd 10
CX2 vgd 0 1n
E01 v01 vgnd VALUE {
+ IF(V(egd)>0.51&V(vgd)>0.51, { vref }, 0) }
R01 v01 ref {3.333e5*SQRT(ttrn)}
C01 ref vgnd {1e-6*SQRT(ttrn)}
E02 v02 0 VALUE {
+ V(ref)*(ABS(V(out)) + 1E-6)/(ABS(V(fbk)) + 1E-6) }
R02 v02 des 10
C02 des 0 1n
E03 drv 0 VALUE {
+ MIN(V(des), MAX(V(vin)-drop, 0))}
R03 drv vxx { psrr*rinp }
C03 drv vxx { 1/(6.28*psrr*rinp*zero) }
E04 vyy 0 VALUE {
+ MIN(V(vxx), V(vzz) + ilim*rout) }
R04 vyy vzz { rout }
F04 vin vyy V04 1
V04 vzz out 0V
.ENDS ldo_basic
Let me know what should I connect to.
Thanks for your assistance.
//Leo Chang
Hi Leo,
Got it. I thought you were referring to the encrypted model available on the product page but I see now that there is an unencrypted version available on the forums.
The PWPD pin is modeling the power pad or thermal pad, and is only connected through R6 to GND. Externally you should ground the PWPD pin.
R6 PWPD GND 10MEG
The bias input to the ldo_basic subcircuit is not something that you need to provide. It is already handled in the line that calls the ldo_basic subcircuit:
X1 OUT GND IN IN EN FB LDO_BASIC
This line is sending the IN net (the fourth input) as the bias input.
Regards,
Nick