Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS7A83A: Output cap selection

Part Number: TPS7A83A

Tool/software:

Hi Team,

I see below comment in datasheet.

And my question is that how to select the appropriate output cap to get proper system stability? As I know, LDO is one pole architecture. Does zero generating by output cap ESR improve the system stability?

Regards,

Roy

  • Hey Roy, 

    Especially for some of our older devices, minimum ESR was essential to maintaining LDO stability. Our newer devices have a more robust compensation network, that allows them to be compensated with low ESR capacitors, like ceramics. 

    The internal ESR forms a zero with the output capacitor whose frequency can be calculated from: ZESR = 1 / (2 X π X ESR X COUT). 

    The zero increases the phase margin at the calculated frequency to make the device more stable across frequency.

    You would know what type of compensation network you need based on a gain and phase margin analysis of your system and the system requirements. 

    This article may be helpful in aiding your understanding: AN-1482 LDO Regulator Stability Using Ceramic Output Capacitors (Rev. A) (ti.com)