Tool/software:
We are using BQ25792 in CELL=3S mode, and made some tests.
After POR we change
VSYSMIN (REG0x00[5:0] =11V
VREG (REG0x01/02) =12,6V
ICHG (REG03) =1.4A
IINDPM (REG06) =3A (set by IC itself because ILIM_HIZ pulled up by resistor)
For powering VBUS we use laboratory power supply with 5A output. We tried to measure the maximum input current of our power supply on the different input voltages using an ICO mechanism.
For simplicity, consider 2 characteristic points measured with the same power supply and the same VBAT_ADC=12V:
1. When VBUS_ADC > VSYS_ADC (buck mode) - for example VBUS_ADC=18V, measured ICO_ILIM (REG19)~2.7A. Input power limit Pin_lim=18V*ICO_ILIM=48,6W.
We saw that VSYS_ADC>VSYSMIN, and IBAT_ADC=1.4A in Fast-Charge CC mode, as we expected. We were completely satisfied with this mode.
2. When VBUS_ADC < VSYS_ADC (boost mode) - for example VBUS_ADC=10V, measured ICO_ILIM~2.0A. Input power limit only Pin_lim=10V*ICO_ILIM=20W!!?? That was more then 2 times less then in buck mode.
But really we didn't saw so input current(power)!!! We saw that VBUS_ADC=10V, IBUS_ADC~1.3A, Pin=10V*1.3A=13W, VSYS_ADC>VSYSMIN, and IBAT_ADC=0.5A in the Fast-Charge CC mode!!! The charge current IBAT_ADC was much less than expected (1.4A) because the input current(power) was for some reason limited but less then ICO_ILIM(Pin_lim). There was a some reserve for the input current(power). When VBUS_ADC=10V, VINDPM(REG05)= 8.6V (set by IC itself). VBUS_ADC was stable and never reached VINDPM.
Then we started adding load in VSYS , the IBUS_ADC(Pin) grew, always was VSYS_ADC>VSYSMIN, сharge current IBAT_ADC was stable but never been more than 0.5A . When IBUS_ADC ~ ICO_ILIM=2A (Pin=Pin_lim), charge current IBAT_ADC smoothly decreased to ~0A. Then more adding load in VSYS turned on supplement mode, and the battery started to discharge.
As a result, we have 2 questions:
1. Is there a difference in the limit input current(power) for buck- and boost- modes under other equal conditions?
2. Why when VBUS_ADC < VSYS_ADC (boost- mode) the chip regulates the input current(power) only to guarantee VSYS_ADC>VSYSMIN, but ignores the requirements for the charge current IBAT_ADC in the Fast-Charge CC mode, even if there is reserve in input current(power)? Is there a way to increase the charge current IBAT_ADC in that mode?
