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TPS25772-Q1: Default status at 24Pin:GPIO1/PB_CC1

Part Number: TPS25772-Q1
Other Parts Discussed in Thread: TPS55288-Q1

Tool/software:

Hello Team,


Could you please tell me about default status of 24Pin:GPIO1/PB_CC1 if we failed to load setting from NVM/MCU when we move to active mode?

Also, could you please share about default setting when we failed to load setting from NVM/MCU?

Best regards,
Kazuki Kuramochi

  • Hello Kazuki,

    I will look into the default state of GPIO1 when the patch bundle fails to load and get back to you.

    What other default settings are of interest?

    BR,

    Seong

  • Hello Kazuki,

    If a patch bundle is not loaded when the device boots up:

    1. GPIO0 will default to PB_CC1.
      1. GPIO1 will default to PB_CC2.
    2. NTC will not be enabled on GPIO5
    3. SYNC will not be enabled on GPIO6
    4. Source cap will be limited to one PDO, 5V 3A, for each port.
    5. The external DCDC config will default to work with TPS55288-Q1.

    Please let me know if you have any other specific questions.

    BR,

    Seong

  • Hello Seong,

    I have the question for your answer  regarding 4. and 5..
    The datasheet said Port B is disabled but 4. is talking about not only portA  but also portB. Also, the buck-boost converter is only for Port B.

    So I little bit confused.

    Could you please share all of configuration information for config file which can reproduce EXT ROM less configuration at GUI?

    Best regards,
    Kazuki Kuramochi

  • Hello Kazuki,

    Let's move this discussion to email.

    I will be closing this thread. Please start a new one for any other queries.

    BR,

    Seong