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TLV773: Inquries for multi-sourcing

Kazuki Itoh
Genius 10710 points
Part Number: TLV773

Tool/software:

Hi team,

My customer is considering TLV773 for multi-sourcing.

Could you please help to answer inquiries below?

  1. If the device is always enabled, EN pin allowed to be connected to IN? Also, is it allowed to leave it floating?
  2. The UVLO is mentioned in the datasheet, but the threshold is not specified.
    Could you let me know the reason why it is not specified?
  3. For multi-sourcing, TLV773 uses N-ch FET which is differnt from standard P-ch FET based LDOs.
    Could you let me know the concern or care about to multi-sourcing N-ch FET LDO with P-ch FET LDO?

Best regards,

Kazuki Itoh

  • 0
    TI__Intellectual 790 points

    Hello Itoh-san,

    Let me see if I understand you inquiries:

    1) The Enable pin can be connected to the input pin if you wish to have the device on every time there is an input. Having the EN pin floating will not activate the device.

    2) The UVLO for the input voltage would be less than 1.4V and 0V for the EN pin. In the case where you connect the EN pin to the INPUT pin, if the input is between 0V and 1.4V, the EN pin will go high but the LDO will not operate since the input would not meet the minimum requirement, resulting in the the device going into UVLO. 

    3) In general, there is no major difference in multi-sourcing N-ch FETs and P-ch FETs as long as they meet your requirements. However, if you do use a N-ch FET LDO that has a bias pin or internal charge pump, their could be some noise at the output. If noise is a requirement for you, consider P-type options, otherwise, it should not matter. 

    Hope this helps.

    Regards,

    Jorge

  • 0 in reply to Jorge Del Rio
    TI__Genius 10710 points

    Hi Jorge-san,

    Thank you for the answers!

    Could you let me know why the UVLO voltage 1.4V is not specified in the datasheet?

    Best regards,

    Kazuki Itoh

  • +1 in reply to Kazuki Itoh
    TI__Intellectual 790 points

    Hello Itoh-san,

    I'm not completely sure why that spec is not listed on the datasheet but I did some investigation and it turns out that the UVLO threshold is 1.3V ± 0.050V, for the minimum and maximum values respectively.

    Hope this helps,

    Jorge

  • 0 in reply to Jorge Del Rio
    TI__Genius 10710 points

    Hi Jorge-san,

    I want to make sure a couple of more detail.

    If the EN pin is connected to other power supply (not IN), the output voltage keeps off when Vin is <1.3V, correct?

    Is it okay to power on and off Vin while the EN is on?

    Also, how does TI determines to use N-ch FET to LDO?

    Or, determine the application to recommend customers to use N-ch LDO? 

    Best regards,

    Kazuki Itoh

  • +1 in reply to Kazuki Itoh
    TI__Intellectual 790 points

    Hello Itoh-san,

    To answer you questions:

    1) If the EN pin is powered (not to IN) and Vin is less then 1.4V typically, their would not be any output voltage. 

    2) While EN is on, powering Vin on and off should be fine as long as you do not go under UVLO as this could turn off the device and have no output. Based on what you are describing, I would recommend looking at the line transient response of the device as this simulates a input voltage from a relative high and low. 

    3) TI typically determines what FET type fits the design of the device based on size and purpose of device. In general, a N-FET is smaller than a P-FET and drives more power and current than a P-FET. Using a N-FET takes up space in the device as an internal charge pump is used to get the low dropout and has internal current protection. Using a P-FET achieves the same as a N-FET without the current protection and charge pump components resulting in a smaller chip size. 

    From my experience, customers only care about the input/output range, current max/min, etc. Rarely does FET type come into consideration as long as the LDO meets the specifications the customer needs. 

    Regards,

    Jorge