LM5143: working mechanism of Diode Emulation Mode

Ken Zhang

Part Number: LM5143
Other Parts Discussed in Thread: PMP31210, LM5137-Q1

Tool/software:

In testing customer's board, customer found that in the case of DCM (DCEMB is chosen) light load, the wave form of the SW illustrated the unstable operation of the LM5143, in order to understand the cause of the occurrence, Tell me more about the working mechanism of Diode Emulation Mode,such as what condition will turn off low side MOSFET to implement Diode Emulation, and having a diagram will help me understand.

over 1 year ago

0 Ken Zhang over 1 year ago

TI__Expert 3595 points

Hi team

would you like kindly give your comments soon?

0 Richard Fu22 over 1 year ago

TI__Mastermind 31185 points

Hi Ken,

Sorry for the delay.

The engineer responsible for this device was out of office so they will need some time to respond.

Thanks,

Richard

0 Timothy Hegarty over 1 year ago in reply to Richard Fu22

TI__Guru 73752 points

Hi Ken,

Apologies for the delay. The SW voltage is sensed yto detect zero crossing of the inductor current. There is a small negative offset added to account for delay. To minimize any extraneous noise pickup that may affect SW voltage sensing at the IC, please ensure that your HO and SW traces are routed differentially back to the controller - keep these traces short and direct as possible.

Regards,

Tim

0 Ken Zhang over 1 year ago in reply to Timothy Hegarty

TI__Expert 3595 points

Timothy

is the negative offset -0.7mV? does -0.7mv=Iinductor*Rdson(low side mosfet)?

0 Timothy Hegarty over 1 year ago in reply to Ken Zhang

TI__Guru 73752 points

Hi Ken,

The 7mV offset is to trip right before actual zero-cross of the current -- this is to compensate for the comparator delay time. And yes, it is current times the low-side MOSFET Rdson that sets this.

Regards,

Tim

0 Ken Zhang over 1 year ago in reply to Timothy Hegarty

TI__Expert 3595 points

Timothy

in PMP31210, the Rdson of MOSFET is 5.7mohm@4.5V. it means that -0.7/5.7=1.22A. The Low side MOSFET turning off will be triggered when current through low side MOSFET<=1.22A( if ignoring comparator delay time), Is it right? i think the trigger current of turning off low side MOSFET is too high to get high efficiency at no-load condition.

0 Timothy Hegarty over 1 year ago in reply to Ken Zhang

TI__Guru 73752 points

Hi Ken,

The negative offset is to manage the delay time of the comparator. It should be fairly close to zero in the actual implementation.

If needed, send on the schematic and a completed quickstart calculator for review.

Regards,

Tim

+1 Timothy Hegarty over 1 year ago in reply to Timothy Hegarty

TI__Guru 73752 points

I see PPMP21310 is a 4-phase design. The LM5143 is not designed to have super high light-load efficiency when operating in single-output mode (as opposed to a dual output), as while it operates in DCM it won't enter sleep mode for lowest quiescent current.

We have a new controller targeted for this type of application. The LM5137-Q1 controller should be online in the next day or two. I'll send you a message offline so we can connect.

Tim

+1 Ken Zhang over 1 year ago in reply to Timothy Hegarty

TI__Expert 3595 points

Timothy

well noted. I will check with customer and update you later.

+1 Timothy Hegarty over 1 year ago in reply to Ken Zhang

TI__Guru 73752 points

Thanks, Ken.

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LM5143: working mechanism of Diode Emulation Mode