BQ21080: As a replacement for BQ25155

I just realised BQ21080 doesn't have an integrated ADC to monitor battery voltage, which is one of my mandatory requirements. In that case, is there any other chip I could consider?

Hello,

If an integrated ADC is required to monitor battery voltage, then we only really provide switching chargers that have ADCs integrated such as the BQ25610 and BQ25620 devices.

The BQ25120A includes a battery voltage monitor which isn't as precise as an ADC but may still be useful for your application. It is a linear charger with integrated LDO and integrated buck regulator.

Best Regards,

Juan Ospina

Thanks, Juan Ospina. BQ25610 and 20 seem like good alternatives, but that’ll require me to do some significant layout modifications to get D+- lines to the ic.

Given that my desire is to avoid using micro/laser vias and vias on pads to lower the manufacturing cost, what if I route /LP (D3) of BQ25155 to LSLDO? Would that allow me to use I2C without the workaround I have on /MR? Once I power the device ON using the switch on /MR, the LSLDO will drive /LP high, enabling I2C, right?

Also, for /INT, what if I route it to C3 and have a via there? Since C3 is an NC, the pin is internally not connected to anything, right?

Sorry for the late reply, Juan Ospina. I was having some discussions with the fab-house on /INT and they suggested routing it out through D2 -> C2 -> B1, with solder masks covering C2 and B1. Please let me know if you have any concerns about this idea.

Regarding /LP, what is the advantage of having a pull-up? Would connecting /LP to LSLDO on D4 alone always work, if my only need is to have I2C communications? For this modification, I should still keep the capacitor C7, right?

Thanks a lot for all the support, Juan Ospina!

Hi Juan Ospina,

I just checked my D4 and it's 0V at the start. Since this whole modification is to get I2C working by pulling up /LP, I guess this would create problems in configuring LS/LDO through I2C. What if I connect D3 -> D4 -> E4? 

The datasheet says "If LDO is not used, short to VINLS" for LS/LDO

My E4 is around 4.48V. According to the absolute max. ratings, up to 5.5v seems to be ok.

Hi,

Due to the holiday Ill be providing further update tomorrow.

Best Regards

Juan Ospina

Hi Dushyantha,

It seems like you don't plan to use your LS/LDO rail? I'm not certain of the implications of this behavior since typically if your LSLDO and VINLS aren't used then VINLS won't be connected to PMID, which it is in your case. It's possible this scenario might work but I'd have to confirm there isn't additional current draw from PMID from having LSLDO and VINLS both shorted to PMID.

I won't have lab access until at least Friday so I'll have to get back to you on this item early next week.

Best Regards,

Juan Ospina

Thanks, Juan Ospina. I'll wait for your update. If possible, please also let me know the delay from the /MR switch press to PMID. I guess this affects how long I should wait before sending I2C configurations. The image in my first post is my current schematic diagram. Although I don't use the LS/LDO rail, my VINLS is connected to PMID. If D3 -> D4 -> E4 is drawing additional current I'll try D3 -> E4 direct. Probably I'll have to reduce d4 and e3 pad sizes and use .08mm routing, which isn't ideal.

This is an update to my existing production-line boards, so I'm trying to achieve /LP pulling high through minimum modifications.

Hi Dushyantha,

Can you clarify what you mean by "delay form the /MR switch press to PMID"? You mean the delay from the press until PMID goes high?

D3->E4->PMID should be fine if anything, but I'll try and confirm if D3->D4->E4->PMID is viable.

Best Regards,

Juan Ospina

Hi Juan Ospina,

Yes, I meant the delay from the switch press to PMID is high.

According to my understanding, I2C communication is only possible when either /MR is asserted or /LP is high. The switch press duration is too unreliable, which means I need to wait until /LP is high to start I2C communications to configure BQ25155 (charging parameters, etc).

Previously, when I discussed having /LP high all the time, the idea was discouraged by others due to additional current consumption (as the device is always in the high-power mode), but I see newer chips like BQ21080 don't have LP at all. Any insights into why it's been removed?

Hi Dushyantha,

The BQ21080 is defined for a smaller footprint, so minimizing the number of external pins was a priority in that part. Most of the configurability of the BQ21080 comes via I2C, this is how device modes such as shipmode and shutdown mode are controlled.

Dushyantha Jayatilake said:

According to my understanding, I2C communication is only possible when either /MR is asserted or /LP is high. The switch press duration is too unreliable, which means I need to wait until /LP is high to start I2C communications to configure BQ25155 (charging parameters, etc).

So to clarify, you'd like to know the timing for I2C communication after /LP goes high?

Best Regards,

Juan Ospina

Hi Juan Ospina,

Juan Ospina said:

So to clarify, you'd like to know the timing for I2C communication after /LP goes high?

Yes, that's correct. 

But on an afterthought, this is an irrelevant question. For the configuration I'm considering, the /LP and the rest of my board (including the main microcontroller) will be powered by PMID. So I guess, by the time the microcontroller is up, the /LP is high and the BQ is ready to receive I2C.

Best Regards,

Dushyantha

Hi Dushyantha,

Alright please let me know if there’s anything else i can help with.

Best Regards,

Juan Ospina 

Hi Juan Ospina,

Juan Ospina said:

but I'll try and confirm if D3->D4->E4->PMID is viable.

You will verify D3->D4->E4->PMID once you have lab access, right?

Hello Dushyantha,

Juan is out of office today, but he should be back tomorrow and will be able to assist you then.

Best regards,

Alec Lehman

Hi Dushyantha,

Sorry, I understood from your previous message that D3->D4->E4->PMID wasn't viable for your solution due to excessive leakage current. I can still try it out to confirm that it works as expected. I'll provide a response by Tuesday.

Best Regards,

Juan Ospina