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UCC28951-Q1: Resonance and time delay

Part Number: UCC28951-Q1
Other Parts Discussed in Thread: UCC28951

Tool/software:

Hello Mike, 

I do not understand the reason for closing the previous thread without finishing all queries.

Moving On to the previous reply, I do not follow you completely. I'm using a fixed delay approach. 

Tdelay formulae is same as tank frequency.

Ls : 22uH

Coss: 22pF

Tabset is calculated around 78nS. 

1. I'm getting a little confused as most application notes start values from 330nS .

2. When you mention where to add delay in that position in previous post, I don't follow it. Since I only have control over DELAB DELCD DELEF resistors. Please explain in simple manner.

3. Kindly mention step by step explanation and calculation as this is critical in understanding the toplogy as well as making the board work. Thanks.

  • Hello,

    Your inquiry is under review and I will get back to you shortly.

    Regards,

  • Hello,

    The thread was closed because the question/s was answered to the best of are ability.

    Hopefully that thread will help other engineers answer the same question you had with the information that was given in the thread.

    Your TABSET and TCDSET delays appeared to be too long.  1 half of a resonant ring could be observed on the transformer could be seen preventing the design from valley switching at this light load.  This would indicate the TABSET and TCDSET delay was too long.

    I do remember that post and there were lines drawn on the resonant ring to where 1/4 the resonant ring started and terminated.

    This should be the time of your turn on delays are set too.  Your delays seem to be too long.

    You need to fine tune the TABSET and TCDSET so it is at the peak of the resonant ring.

    TABSET = TCBSET = 1/(2*4*3.14*(Csw*(Llk+Ls))^2

    In your case you have a waveform with a resonant ring

    TABSET = TCBSET = Time of the resonant ring from zero to peak

    Please note there are delays in the system that may require you to fine tune the circuit so the A, B, C and D FETs turn on at the appropriate time for ZVS and valley switching at lighter loads.

    The following link will bring you to an application note that goes through the step by step design process of a phase shifted full bridge using the UCC28951.  I believe this information will help you in the design process.

    https://www.ti.com/lit/pdf/slua560

    Thank you for interest in Texas Instruments (TI) products.  If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

    Regards,