Tool/software:
Hello,
I currently have the problem, that the MCU controlling the TPS and the load do not use the exactly same GND reference.
While the load uses the power directly delivered by the PSU, the MCU is behind a CMC filter which puts an impedance between the two GNDs.
Other than that I tried to avoid any impedances in the ground path, apart of the unavoidable parasitc ones.
In the case of pure DC obviously this doesn't matter, but I'm a bit concerend regarding transients and inrush currents. I already implemented the
suggested 4k7 series resistors on the paths connecting the MCU to the HSS controller since it's similar to a ground loss event (in my head at least).
Lossing ground reference or effectivly shifting on above/below the other shouldn't technically not make that much of a difference or?
Is that precaution enough to protect the MCU from possibly unwanted surges/damages?
When scrolling through the TPS4811's datasheet on p. 14, Figure 8-1 and internal block diagram of the IC is depicted.
Apart from the IWRN and IMON pins and their respective circuits, it seems like there is serperation between logic and power,
also because the power part doesn't need a GND reference since the FET is controlled by a charge pump referencing the SRC pin.
Could such a seperation be achived or is the internal structure of the IC very different from the block diagram and this measure therefore not possible?
Thanks a lot for any answers,
Lukas
