TPS62933P: 3A LOAD , What is the Inductor value and RT value shall be used.

Hi Abhilash

The converter cannot provide consistent 12V, 3A , the Tj will rise up and hit over temperature protection.  But the IC has OCP and OTP current protection and should not broke.

I see no Cin in the schematic, can you please share the full schematic? Is there any ceramic capacitor placed closed to the IC Vin and GND pins? Did the device broke during start-up or steady-state? Can you please measure the waveform of Vin&SW?

Thanks and best regards.

I used a 100uF/65V electrolytic capacitor for Cin and also placed a 22uF ceramic capacitor near the IC. The device broke twice before, but after I placed the 100uF electrolytic capacitor, it didn’t break again.

Why did you give confusing data  like below ? 500KHz floating or 40Kohm.

Could you suggest best IC for 3A?

Hi Abhilash

TPS62933 can support 12V,3A if you use lower fsw like 500kHz, the Tj will be 112℃ under 30℃ Ta according to the Webench simulation Tool: https://webench.ti.com/power-designer/switching-regulator/customize/217?VinMin=24&VinMax=24&O1V=12&O1I=3&base_pn=TPS62933P&AppType=None&Flavor=None&op_TA=30&origin=pf_panel&lang_chosen=en-US&optfactor=3&Topology=Buck&flavor=None&VoltageOption=None

A 0.1uF ceramic cap is needed close to the IC , Can you please share your layout? 

TPS56837 is also recommended as it supports higher current capacity. You can use the Webench to help with design:https://webench.ti.com/power-designer/switching-regulator/customize/218?VinMin=24&VinMax=24&O1V=12&O1I=3&base_pn=TPS56837&AppType=None&Flavor=None&op_TA=30&origin=pf_panel&lang_chosen=en-US&optfactor=3&Topology=Buck&flavor=None&VoltageOption=None 

For the fsw setting: the fsw is programmable by RT, but we choose two normal fsw -400kHz&1200kHz as the default fsw value when RT floating or connect to GND, the 2 fsw value is well-regulated.

Thanks and best regards.

thank you for the reply.

Please find the layout snap 

One more question about Switching frequency Vs inductor. Normally high frequency will provide more current , right? if yes, why is it have difference? What is this relations ?

Hi Abhilash

Is this the Cin? The Vin trace is very thin, there can be larger parasitic inductance & resistance if the trace is thin.  You can refer to the 12.2 Layout Example in the datasheet. There is also an apps note: https://www.ti.com/lit/an/slva922/slva922.pdf?ts=1725350612067&ref_url=https%253A%252F%252Fwww.google.com%252F 

The Iout_max is not directly related to fsw, but is related to the ΔiL, as seen in the eqation(17) below, the IL_PEAK is 5A as specified in datasheet Table 8.5 Electrical Characteristics. 

The inductance selection is specified in 10.2.2.7 Output Inductor Selection in datasheet. smaller inductance can be used under higher fsw, this can same cost&solution size, but the switching loss is higher under higher fsw.

How the Switching Frequency Affects the Performance of Buck Converter

Thanks and best regards.

Thank you Gul,

what shall be the trace thickness for input for 3A? below is revised layout. we are using two layer.

Hi, Gui He will reply later today.

Hi Abhilash

Short& Wide trace is preferred. You can refer to the layout of the TPS62933EVM: There are also some Layout guidelines in the section 12.1 of the datasheet. 

Thanks and best regards.