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TPS1211-Q1: failure modes and range limiations

Josh Wei
Intellectual 2989 points
Part Number: TPS1211-Q1

Tool/software:

Hi team!

Could you please help with below six questions from my customer? 

  1. What kind of failure mode will TPS12110 cause if Rscp is open or shorted?
  2. What kind of failure mode will TPS12110 cause if Rset is open or shorted?
  3. What kind of failure mode will TPS12110 cause if Rimon is open or shorted?
  4. What is the voltage limit range across Rscp?
  5. The range of I(iscp) is 13.7uA-17.6uA. In our current application scenario, the error of the short-circuit protection point is ±30A. Is there any way to reduce the fluctuation of I(iscp) and improve the protection accuracy?
  6. Is the ±200uV deviation of V(OS_SET) a random deviation? Why is +200uV used in the application example in the datasheet?

Thanks!

Best Regards

Josh Wei

  • +1
    TI__Mastermind 34935 points

    Josh,

    #1 through #3 will be described in detail in the pin FMEA:

    https://www.ti.com/lit/pdf/sffs471

    For #4, SCP is always tied to VS so the recommended maximum of 40V would apply here.

    For #5, the layout placement of the SCP resistor will help with accuracy here. The SCP setting is operated by an internal comparator that looks at the reference after the SCP line and the CS- line as seen below:

    This means that if there is a lot of impedance between RISCP resistor and the RSET resistor, you will run into a lower current limit trigger at higher current settings. The solution here would be to minimize the trace impedance as seen below:

    This should help with improving the SCP accuracy.

    For the last question, the V(OS_SET) is a parameter in the electrical specifications of the datasheet with a defined minimum and maximum.

    Best Regards,
    Tim