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UCC27282-Q1: I'm trying to make a flying capacitors active battery balancer, but it doesn't seem to work. How should I connect the parts?

Part Number: UCC27282-Q1

Tool/software:

Hello! As it says in the title I've been trying to make an active Sodium-Ion ESP32 active battery balancer using the UCC27282-Q1 for the past couple of months. I came up with 2 different versions, none of which I am sure are wired accordingly or that they work. Could you please tell me how I should wire the IC to the MOSFETS or if the IC is even for this application as it says it can do half bridge.

The project was inspired by this video where it explains a basic schematic of the battery balancer at 6:24:How Does An Active Balancer Work? (youtube.com). Also here's the schematic from the video which I tried to copy but I just don't know where the HO and LO pins should be, which ones are high and which ones are low, and whether there must be 1 driver/ each 1 pair (from right to left), so essentially the number of drivers would be (number of mosfets/2)

OR if there should be 1 driver/ battery. One battery has 2 bottom and 2 top so each pin gets 2 mosfets therefore a driver will have 4 mosfets assigned to it, not 2, therefore number of drivers = number of batteries

Also where are we supposed to connect the DS pin? to the negative part of the capacitors or to the positive?

See the designs and if you could draw or tell me how to do it that would be HEAVILY appreciated! Is any of these 2 designs right?

As far as I understood flying capacitors work in 2 phases:
1. Connect capacitors to batteries in parallel (bottom MOSFETs activated, top deactivated)

2. Connect capacitors in parallel (bottom MOSFETs deactivated, top activated)

-In both designs, E-HI-P1 and E-LI-P1 are controlled by an ESP32 digital pin. E-HI-P1 controls all the "HIGH" side driver inputs "HI", and E-LI-P1 controls all the "LOW" side driver inputs "LI".

-GND is battery negative. P1/2/P2S-E/... mean battery positive 1/positive 2. (Both designs are for a 2S battery balancer)

-Also all drivers have been driven by an ESP32 or Arduino UNO

Here's the schematic of the first design:

  

Here each driver controls 1 pair of mosfets, therefore 4 drivers. It made more sense because that way I could connect DS-1 to line GND, DS2 to line P1, DS3 to line P1 and DS4 to line P2.

Results with this design:

- 1 X board seemed to have succesfully balanced out a approx 1V difference between 2 batteries in like 24 hours. (small switching frequency), cool

- 1 X board on fire (may have been my mistake with some MOSFETs having bad connections)

- 3 X boards not tested thoroughly

Here's the schematic of the second design:

  

Here I used HO and LO each driving 2 mosfets so 4 in total, 1 driver per 4 mosfets. But which is which? Which is HIGH side and which is LOW side? I also didn't know where to place DS so I just placed it on the GND line (when the capacitors are placed in parallel)

Results:
- 1 X board today, nothing on fire, but didn't seem to balance even 1mV in 15 min, switching frequency 500Hz, 1V difference between batteries

  • Hey,

    Thank you for reaching out to TI with your questions regarding the UCC27282-Q1.

    This is not the typical application where we see these gate drivers being used. In general though, the driver is designed for driving capacitive loads in switching applications that allow the high-side driver bias (bootstrap capacitor) to recharge on each cycle. This charging and recharging for the high-side is described in this application note.

    Bootstrap Circuitry Selection for Half-Bridge Configurations

    Can you please share the FET Part numbers as well as any gate resistors that you have included? Also a full schematic would be helpful.

    Here is another document on schematic reviews.

    Please help us to understand how you are operating and the switching control that is being used here for this circuit as we are the experts on the UCC27282-Q1 and not necessarily the experts on all topologies of electronics.

    Thank you,

    William Moore

  • Hello! Thank you for the reply! So here is the FET part number: 78-SISH106DN-T1-GE3

    Also where you said:

    Here is another document on schematic reviews.

    I think you meant to add another link here?

    As for the schamatic, my latest PCB uses the connections from the pictures above. Other than the MOSFETs and the gate drivers, there's 1 X 12V BOOST converter (from 3V3), 1 X 3V3 Buck converter and an ESP32 S3 which drives the HI / LI pins of the gate drivers with digitalWrite(). I will attatch some more parts of the assembly:

           

    My code for the application simply drives HI HIGH (3.3V), LI LOW (GND), and then flips their states constantly. When one is HIGH the other is low so that the gate drivers only ever have either HI or LI logic HIGH.

    Now the ESP32 is 3V3 logic so all pins raised HIGH will be 3V3, but I also tried with an Arduino UNO which is 5V logic.

    Can you please share the FET Part numbers as well as any gate resistors that you have included?

    Wait, there should've been gate resistors for the NFETs? Pull DOWNs/UPs? Or what do you mean? The schematic is just as the one from the image in kicad, I didn't use any resistors on the gates.

    I just want to know if the way I am connecting the drivers to the mosfet gates is right. 1 Gate driver/ 4 mosfets  (2 HIGH side, 2 LOW side).

    Right now 1 driver drives mosfets M1,2,5,6 and one driver drives M3,4,7,8 as in the image. The mosfets at the bottom of the image are considered HIGH side, while those at the top are LOW side. Come to think of it, the voltage required to drive M2 might be different than that required to drive M1. Because the voltage difference between Drain and Source (Vds) for M1 is GND -  (Whatever charge the caps have), which is negative, while M2 has (Voltage of the First battery) -  (Whatever charge the caps have on the other side)

    Could you please evaluate my schematic and if it seems wrong, draw it as you think it should be right for my active balancer application? I attatched the reference video in the original post

  • Hey Foca,

    My apologies, I did not provide the schematic review file.

    UCC2728x Schematic Review Template.xlsm

    Also, here is a guide for selecting components for the circuit.

    [FAQ] UCC27282: Calculating Component and System Values for Designs Using Half Bridge Drivers

    The gate resistors are in place between HO/LO and the gate of the MOSFET, so it is in series with the HO/LO path. This is for controlling rise and fall times and preventing overshoot. The guides above have some insight on sizing that gate resistor.

    It is acceptable to connect 1 output (HO/LO) to multiple parallel FETs so you can drive 4 total FETs with the UCC27282-Q1. When connecting the gate driver to FETs, you need to ensure that you are in a typical half-bridge configuration so that the bootstrapping circuitry can operate as discussed in the App Note that I linked in my reply above. Overall, your configuration should look like the following with the exception of the inductor in your case:

    If you do not have a setup similar to this, you will need to make provisions for biasing the high-side instead of bootstrapping.

    Thank you,

    William Moore

  • Hey Foca,

    Were you able to resolve this and make this solution work? Or do you have any further questions regarding this?

    Thank you,

    William Moore

  • Hey Foca,

    I am going to close this thread at this time. If you have further questions, please reply and reopen this thread and I can help to resolve any issues that come up.

    Thank you,

    William Moore