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BQ2970: Regarding the 5MOhm gate capacitance discharge resistor

Part Number: BQ2970

Tool/software:

Hi,

The pin descriptions in chapter 5.1.4 and 5.1.5 of the BQ2970 datasheet the following is stated:

"A 5 MOhm high impedance resistor is connected from DOUT (COUT) to VSS for gate capacitance discharge when the
FET is turned OFF."

Further down, in chapter 9.2.2 there is a bullet stating "TI recommends placing a high impedance 5 MOhm across the gate source of each external FET to deplete any charge on the gate-source capacitance."

Question 1: From chapter 5.1.4/5.1.5 one get the feeling that the 5MOhm resistor is included in the IC as it is part of the pin description and says that a resistor IS CONNECTED (rather than should be connected or so). But it is correct to understand that the IC does not have any such internal resistance, and that it is up to the user to add this resitance to the board?

The functional block diagram in chapter 8.2 shows both push and pull FETs for COUT and DOUT. Therefore it was assumed that the IC is very capable of discharging any gate-source capacitance without the help of an external resistor.

Question 2: How come a 5 MOhm resistor is recommended even though there are internal pull-down FETs for DOUT and COUT? Are they only momentarily driven?

Question 3: We considered that perhaps the 5 MOhm on DOUT would be related to gate floating in power-down state (when DOUT should be low in over-discharge status). Is it correct to understand that this issue of floating gate drive is not related to the power-down state, since the resistor is recommended also for COUT (which typically would be more related to protection at a high battery voltage where the power-down state does not occur)?

  • Hello Southern Engineer,

    From chapter 5.1.4/5.1.5 one get the feeling that the 5MOhm resistor is included in the IC as it is part of the pin description and says that a resistor IS CONNECTED (rather than should be connected or so). But it is correct to understand that the IC does not have any such internal resistance, and that it is up to the user to add this resitance to the board?

    Correct, the wording is a bit confusing, but it is trying to say that the user should add the 5-MOhm resistance on the board. You could look at our EVM schematic for reference.

    The functional block diagram in chapter 8.2 shows both push and pull FETs for COUT and DOUT. Therefore it was assumed that the IC is very capable of discharging any gate-source capacitance without the help of an external resistor.

    Correct, during normal operation, however there can be cases where the pin is not directly controlled to be high or low (Like when the device is in SHUTDOWN. A gate-source resistor will ensure that the MOSFET remains OFF during all the conditions it needs to be OFF.

    Question 3: We considered that perhaps the 5 MOhm on DOUT would be related to gate floating in power-down state (when DOUT should be low in over-discharge status). Is it correct to understand that this issue of floating gate drive is not related to the power-down state, since the resistor is recommended also for COUT (which typically would be more related to protection at a high battery voltage where the power-down state does not occur)?

    I think it would be related to both. For example in the case of zero-volt charge inhibit, it is possible for the pin to become Hi-Z, so you would want to have the resistor to keep the MOSFET OFF in all scenarios. For most of the time it should not be necessary.

    Best Regards,

    Luis Hernandez Salomon