Tool/software:
Hi team,
The output current of gate driver usually depends on total resistance of gate driving current path.
Output stage limits max output current. But this device has minimum peak current, this specification makes me confused.
What reasons limit minimum current? And what are the consequences if the gate peak current is less than this value?
Best regards,
Yanhui
Hi Yanhui,
You are right that the output current of the gate driver depends on many factors. In fact, the real output current rarely ever reaches Iout peak in normal operation!
This spec is a measure of the saturation current of the output stage. You can measure this with 330nF capacitor load (below). But this is an absolute maximum only acheivable with high capacitance and low resistance loads. The minimum indicates that at high temperatures, the maximum possible current in this condition is still at least 5A. In my test of UCC5320 below, I show the output current reduction for Tj=~150C.
However, usually other factors are more important to analyze the practical output current:
1. The Cload of a FET or IGBT is relatively small, and the rise time of the Iout is often slow enough so that the output charges Vgs fully before peak Iout is reached (see 1.3A peak below)
2. External Rg and Vdd set a maximum Ohm's law current. A 5 Ohm Rg and a 15V supply will never deliver more than 3A. Usually the Roh and Rol are better ways to calculate the peak output current.
Best regards,
Sean
Real Measurement for CM30015065D, Rg=5: the UCC5350 max Iout=1.3A (Ch3 measures current using differential probe across Rg, CH1 is Vgs)
No problem Yanhui,
Here was the turn-on saturation current vs. 150C Tj measurement with a 330nF load:
