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BQ76952: Need your assistance in the schematic and layout

Part Number: BQ76952
Other Parts Discussed in Thread: BQSTUDIO,

Tool/software:

Hello team,

I have designed a BMS. It detected all the faults properly except for short circuit. The issue is sometimes it detects SCD and OCD1 together. But sometimes it fails to detect. I want to know if there are any mistakes in that layout and request you to let me know what are the modifications needed to make it work  . I would like to share my schematic and layout personally and need your suggestions regarding modifications. Let me know how can personally share it with you. This is urgent and I would appreciate your quick response. 

Thank you

  • Hello Phanidar,

    Can you share you bqStudio (.gg) file, your test procedure, and your setup as well? To share it personally with me, you can DM it once you accept my request.

    Best Regards,
    Alexis

  • Hello Alexis,

    I have personally shared the files with you. Request you to go through them.

    Thank you

  • Hello Phanidar,

    Thank you for sharing your files. Please give me time to review them. 

    Best Regards,

    Alexis

  • Hello Alexis,

    Sure. I hope you can provide the feedback in 2-3 days. Based on that , we can decide to go ahead with the same design with suggested modifications or redesign the board (worst case possibility)

  • Hello Phanidhar,

    I will try to get back to you within that timeline, not including the weekend.

    Best Regards,
    Alexis

  • Hi Phanidhar,

    What is the voltage between the SRP and SRN pins when you are conducting these tests? There is some tolerance on the current protections that can cause testing right at the set threshold to sometimes trigger the fault and sometimes not.

    Regards,

    Max Verboncoeur

  • Hi Maxwell,

    We have set the threshold voltage to 100mV for SCD. We are using 1m ohm current sense resistor so it is 100A cutoff. I have another query here. In case the voltage drops at BAT pin of AFE during short circuit test, is there any possibility that battery pack is faulty ? We have used the recommended capacitor and resistor values.

  • Hi Phanidhar,

    What current are you applying for the test itself? The SCD protections have a fairly large tolerance on them (explained in the datasheet), so it could be on the edge of the detection threshold.

    Regarding the BAT pin voltage dropping, the diode that we recommend placing between the BAT pin and the BAT+ node helps to prevent the supply voltage from being pulled down during SCD. The goal is that the FETs turn off and the battery voltage recovers before the device loses power. Are the FETs turning off too slow? Note that probing BAT during SCD could cause the voltage to drop faster than normal.

    Regards,

    Max Verboncoeur

  • Hi Maxwell,

    Apologies for accidentally clicking on the tab as resolved issue. The way we are testing short is by trying to connect the PACK+ and PACK- together. So when they both are in contact short is detected and fault is triggered. 

    Regarding BAT pin drop, yes we are probing it to check if the voltage is dropping. So does this probing cause random voltage drop at BAT pin? But we tried without the probe as well and still not able to detect sometimes. Infact, this random failure in detection is the reason why we started probing at the BAT pin. We also noticed that the AFE is getting reset during this detection failure. A bit confused at this point i.e. is there a noise signal on the RST_SHUT pin that is resetting the AFE during testing by dropping the voltage at BAT ? Or the BAT voltage drop is causing the scd failure and causing the reset? And to clarify , this issue regarding BAT pin drop is not related to the design I shared with you personally. 

  • Hi Phanidhar,

    I recommend observing the voltage between the SRP and SRN pins on a scope to get a more accurate idea of what the device is measuring during these tests. The injected current may not necessarily match what the device sees since the RC filters on the pins can influence the received signal.

    No, I don't believe the BAT pin voltage dropping is a design error. I think it would be helpful to see the waveform of the SRP/SRN voltage as there is a known device reset condition that is caused by the SRP/SRN pins both exceeding ~0.75V above VSS. If the SCD transient is pushing the pins over this threshold then it would explain the behavior you are seeing.

    Regards,

    Max Verboncoeur

  • Hi Maxwell,

    I will be verifying the waveform at SRP/SRN and get back. So this device reset of ~0.75V is programmable or fixed? Also, since the device resets, is it a good idea to continue the short circuit which we create? Because on reset, as the AFE restarts, I am concerned about the remaining board circuitry in case short is not detected after restart. 

  • Hi Phanidhar,

    The reset is not programmable. If the device resets, the FET drivers will also reset and should turn off and then could turn back on shortly after depending on what the initialization settings are.

    Regards,

    Max Verboncoeur

  • Hi Maxwell,

    We checked on scope today and noticed the spikes at SRP and SRN causing the IC to reset randomly. So we have placed two 0.1uF capacitors from SRP to GND and SRN to GND and this issue of reset hasn't occurred. The fault was detected properly everytime.

    So just to confirm, without these 0.1uF capacitors, does this mean that whenever BQ76952 detects spike, it is reset and whenever it fails to detect the spike, it is able to detect the short circuit fault?

  • Hi Phanidhar,

    A spike on both pins that exceed their recommended limit (0.75V) will cause a device reset and the device can fail to detect the SCD. By suppressing the spike to below that limit, the device will detect the SCD as expected.

    Regards,

    Max Verboncoeur

  • Hi Maxwell,

    Thank you for the clarification. Please share your feedback and suggestions on the schematic which I shared with you personally.

  • Hi Phanidhar,

    The schematic looks good to me. The only thing I saw you don't have that we recommend is a 10M from BREG to VSS to help keep the pin low while it is off.

    Regards,

    Max Verboncoeur

  • Hi Maxwell,

    Thank you for the feedback. I will try testing with one more board with 0.1uF filter capacitors placed from SRP to GND and SRN to GND.

    Thank you

  • Hi Maxwell,

    Thanks for your support. We tried testing with one more board. This time we placed 0.1uF filter capacitors from SRP and SRN to ground. It was detecting short circuit and SCD fault was triggered. However we noticed that when we charged the battery pack until over voltage cutoff and tried to short circuit test, it was not getting detected. The FETs are burnt because of not detecting the fault. Is there a problem with the battery pack itself?

  • Hi Phanidhar,

    Could you capture a waveform of the SRP-SRN pin voltage during this? Are both the CHG and DSG FETs being burnt?

    The BQ should detect the short circuit even in this condition, but perhaps the CHG FET being off due to the OV is causing some issues.

    Regards,

    Max Verboncoeur

  • Hi Maxwell, 

    No. Only the discharge FETs are getting burnt. The charge FETs are safe. When the FETs are burnt the first time, we replaced them, discharged for some time and performed the test again.It successfully detected. Then when we charged it again until COV and performed the test, it failed to detect at that time again.

  • Hi Phanidhar,

    Could you observe the voltage between the SRP and SRN pins to see if the fault threshold is being met?

    Regards,

    Max Verboncoeur

  • Hello Maxwell,

    We were not able to monitor the voltage between SRP and SRN pins. When we try to connect the probe the AFE was showing random faults. However, we tested the same BMS with another battery pack. On this one, at lower voltages, the AFE was resetting while it detected the SCD fault properly at full voltage. It has reset only once at full voltage level. At that time, the fuse we used to connect the BATT+ and battery positive was burnt along with FETs.

    The previous battery pack was an older one(more than 5 years old) . The difference between max and min cell voltages was also high (around 0.4V). The one which we tested now today is new pack.

    My understanding is that it is randomly failing. Will adjusting the RC values of SRP and SRN can prevent this sort of failure? I am thinking of replacing the recommended 100 ohm with 51 ohm (with 0.1uF caps connected). Will that have any major effect on detection?  

  • Hi Phanidhar,

    The device should not be triggering faults from connecting a probe between the SRP and SRN pins. Do you have other probes connected? Are the ground leads on different nodes?

    You may try adjusting the filtering characteristics of the RC filters to target the specific transients that the device is seeing in your system. These aren't very important for detection since the measurement is a differential measurement. It should only affect the filtering frequency.

    Regards,

    Max Verboncoeur

  • Hi Maxwell,

    No, we didn't connect any other probes. We wanted to notice what is actually happening. So we touched one probe to SRP and noticed that it is triggering short circuit fault. We also tried to connect both SRP and SRN to oscilloscope and noticed that it was triggering short circuit fault. We held it for long and it was triggering scd fault followed by latch (we set the limit for latch to 2). So is it picking up the noise?

  • Hi Phanidhar,

    What is the probe impedance? A 10M probe should not cause any noticeable difference in the voltage across the sense resistance.

    Regards,

    Max Verboncoeur 

  • Hi Maxwell,

    The probe impedance is 1M ohm. The RC filter components of BMS IC reset pin close to the SRP and SRN lines were picking up the noise randomly. We removed it and the noise is eliminated. Now the detection is proper. Thank you for your support!

  • Hi Phanidhar,

    I'm glad you found the cause!

    Regards,

    Max Verboncoeur