Tool/software:
Hi, we have a design using TUSB1044 to boost USB 3.0 signals. Yet, it does not work as expected. Some consultant said it might the IC chip is not configured when it was out of factory. Please let me know whether this chip on market without firmware is common. If possible, I attached the schematic and layout for review. For received PCBA, D1 is not installed. It can enumerate USB 2.0 device and data rate can go up to 400Mbps, but not USB3.0 device.
Thanks in advance.
Hi Kelly,
I'm looking at your schematic and it appears you're going for a similar design as our TUSB1044 EVM. I have a few questions/concerns about the implementation:
1. You have USB-C receptacles on both sides of the board, yet there is no PD controller to determine cable orientation. You need to have a PD controller attached to each USB-C receptacle so our device knows which orientation the cable is in. The way our EVM handles this is by fixing the orientation on one side (with a USB-C plug) and allowing the user to set the FLIP bit themselves to control the orientation on the other side.
2. Similarly to the above, you cannot configure one TUSB1044 based on two Type-C receptacles because there is only one FLIP bit input. Please see the answer to this E2E thread on a similar implementation.
3. You need to use 330nF capacitors on the RX lines. In your design, you use 220nF on the RX and TX lines. Please refer to the TUSB1044 schematic for an example:
Are you able to fix the Type-C orientation on one side and use a PD controller on the other?
Best,
Shane
Hi Kelly,
Do you see any signal moving through the TUSB1044 High speed lines (TX1/TX2/RX1/RX2) when you connect to the USB host? You should see LFPS transmitted through the 1044 when the host sees an attached device.
I'm looking at the layout file and have a few recommendations to improve the signal integrity:
1. I recommend using size 0201 capacitors on the TX/RX lines before and after the TUSB1044. The size 0603 capacitors you use currently are large enough to cause signal reflections in the trace. In general you want the capacitor PAD size to be close to the USB trace size to minimize reflections:
2. Use symmetrical GND vias near all signal vias. Keeping symmetrical GND vias near signal vias will create a strong return path for the high speed signals:
You've done a good job near some of the signal vias. I recommend doing this for all signal vias.
3. The trace does not look symmetrical under the U4 ESD diode. I recommend modifying the DTX1_P trace so it is symmetrical with the DTX1_N trace:
4. You are direct connecting all EQ settings to GND:
This means our re-driver will not apply any equalization to the high speed signal. Instead, the device will add 2.1dB of loss which can hurt the signal integrity. I recommend trying higher EQ settings that add equalization to counter loss rather than using the lowest setting.
When the signal incurs too much loss, it can become unrecognizable by the USB host and device. If the USB3 signal is not recognized, the USB link will fall back to USB2 speeds. The key benefit of a re-driver like the TUSB1044 is that it adds equalization to the signal that counters high insertion loss. This equalization (EQ) will only be applied when the EQ settings are set correctly.
Best,
Shane
