Tool/software:
The TPS2HCS10-Q1 device has an optional cyclic redundancy check (CRC) feature to ensure each SPI frame (SPI Format: COPL = 0, CPHA = 1) is transmitted and received properly. This CRC calculation is based on the CRC-4-ITU standard, with a polynomial of x4 + x + 1 and a starting value of 1111. For more information, see the TPS2HCS10-Q1 data sheet. Please see below a code example on how to calculate the CRC bits:
uint8_t crc_encode(uint8_t send_rec_bytes[3])
{
uint8_t crc_start = 0x0F;
uint8_t crc_polynomial = 0x03;
uint8_t crc_result = crc_start;
uint8_t bitnum = 0;
uint8_t bytenum = 0;
for(bytenum = 0; bytenum < 3; bytenum++)
{ for(bitnum = 0; bitnum < 8; bitnum++)
{
if((((send_rec_bytes[bytenum] >> (7-bitnum)) & 0x01) ^ ((crc_result & 0x08) >> 3)) > 0)
crc_result = crc_polynomial ^ ((crc_result << 1) & 0x0F);
else
crc_result = (crc_result << 1) & 0x0F;
}
}
for(bitnum = 0; bitnum < 4; bitnum++)
{
if(((crc_result & 0x08) >> 3) > 0)
crc_result = crc_polynomial ^ ((crc_result << 1) & 0x0F);
else
crc_result = (crc_result << 1) & 0x0F;
}
return crc_result;
}