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TPS23757 flyback - current sense problems

Phillip S
Prodigy 90 points
Other Parts Discussed in Thread: TPS23757

Hi,

I am in the process of implementing a flyback converter for PoE using the TPS23757 chip

http://www.ti.com/product/tps23757#technicaldocuments

 

I am having some problems with the current sense feedback. I have my blanking time set to 120ns and a sense resistor of 0.27 ohms but as soon as the converter is turning on the voltage at the CS pin jumps to 2 volts (there is a lot of noise on it) and the converter kicks in the over current protection and shuts down as soon as the blanking time is reached. The inductance of the primary winding on my flyback transformer is 230uH and I am running the converter at 350kHz.

 

I noticed in some of the reference designs the CS pin is biased to 0.25 volts by pulling it high to either Vb or VDD (see figure 1 here http://www.ti.com/lit/ug/slvu318b/slvu318b.pdf ).

 

What is the purpose of biasing the CS pin in the reference design?

 

Has anyone else had issues with excessive noise appearing on the CS pin? How did you solve it? I have implemented an RC filter to try and minimize the nose but it has not helped a lot.

 

Cheers

Phil

  • 0
    TI__Expert 7990 points

    A dc offsett (current sourced from Vb) can be used to reduce the voltage required across the current sense resistor to hit the current-limit (fixed Ipk value) point in the controller.  The idea is to improve efficiency a bit. 

    Creating a varying offsett from Vdd at the current sense point causes a varying current-limit point based on the input voltage.  Flyback short-circuit output current tends to increase with rising input voltage for a number of reasons.  Adding a rising dc pedestal voltage to the current sense with rising input voltage countersacts this effect.  This reduces the worst-case stress in the output rectifiers into a short.

    Several common reasons for the large voltage on the CS pin (assuming this is really the result of  I_mosfet x Rsense) is that either there is a shorted winding, or there is a phasing problem in a secondary.  Either of these would reduce the effective inductance when the switch turns on. 

    Shorts could be internal or external to the transformer (e.g. a solder ball). 

    Phasing refers to the dotted orientation of the windings.  When the primary switch turns on, all secondary windings (including the typical primary bias winding)  should have voltages that would turn the output rectifiers off (reverse bias).  In the case of the circuit in document SLVU318B, the secondary-side synchronous rectifier (MOSFET Q1) should be turned off when Q2 turns on.  A reversed or shorted  output recitfier will also have this effect.

  • 0 in reply to Martin Patoka
    Prodigy 90 points

    Thanks Martin,

    I suspected that the DC offset was to reduce the voltage required across the current sense resistor. Thanks for confirming that.

    As for the excessive noise on the current sense pin, I have already checked for everything you have listed. I built up a second supply this morning as a last resort and it is working! Happy days :-). I am still not sure what is wrong with the first supply I built up. I have done a number of visual checks and as far as I can see both supplies are identical. I guess it could be something internally wrong on the circuit board itself or a dry join somewhere.

    Cheers

    Phil

  • 0 in reply to Phillip S
    Prodigy 90 points

    Hmm, looks like I spoke too soon.

     

    When I tested the second power supply I built up, the isolated and non-isolated grounds were joined through the oscilloscope. Once I removed this connection the power supply stopped working and started exhibiting the same symptoms as before.

     

    I don’t understand why this would happen. I have checked and changed the transformer a couple of times and the isolation between primary and secondary seems fine (I am using new transformers so I would hope they are OK). The only thing I can think of is there is some noise on the ground which is removed when I join the two planes together? Any ideas?

  • 0 in reply to Phillip S
    TI__Expert 7990 points

    I had an email there was a new post, but it is not in the Forum. 

    I will assume the issue is resolved unless we hear back..

  • 0 in reply to Martin Patoka
    TI__Expert 7990 points

    I will assume that this is your own board. 

    We haven't reviewed your schematic, BOM,  or layout (next step).   There could be too few or too many connections or too few or too many parts. 

    You did not mention if the converter worked at full load with the grounds tied together. 

    Compare wafeforms to a similar one of our reference designs.  It can be confusing comparing ON and OFF waveforms (when primary MOSFET is ON, what are the secondary windings doing). 

    The next place to look that could be related to your I/O grounding/noise clue is layout.  The CS, current sense,  line is a critical and noise sensitive.  Coupling gate drive edges into this is a problem, as are being over the wrong ground plane, and the referencing of the sense-resistor ground to the IC's RTN/ARTN. 

    You might also consider having your local TI Field Applications Engineer help you. 

    I am told the forum chain probably broke due to pasting content from Word into this text box.  This seems unlikely, but there is a paste from Word icon in the tool bar.

  • 0 in reply to Martin Patoka
    Prodigy 90 points

    Thanks Martin,

    I increased the capacitance coupling the two ground planes from 2nF to 20nF and it seems to have fixed the problem I was having. The converter is starting up OK. I just need to tune the different parameters of the flyback now.