Tool/software:
Hi
We are using TPS6508641RSKT in our design. As per datasheet we have followed, "Do not allow the AGND, PGNDSNSx, or FBGND2 to connect to the thermal pad on the top layer".
However eval board layout is not as per this. We noticed thermal pad connected to gnd on top layer. We want to know if the below implementation we have followed(we have not connected thermal pad to gnd on top layer) is ok or not.
regards
Prema