UCC21750-Q1: VCC open and short case

Chuqiang Wen

Part Number: UCC21750-Q1

Tool/software:

Hi team,

My customer performed open and short cases on VCC pin of UCC21750-Q1. Would like to check with you the behavior to make sure it is aligned with device logic.

PS: VCC not share the same supply with pull up supply rail on RDY/FLT/RST.

1. VCC short to GND

When VCC short to GND, RDY pin will be pulled down for 2us, then RDY will go back to logic high.

2. VCC open

When disconnect the supply from VCC pin, we still can see 3.7V voltage on VCC pin and don't have any fault reported.

Are these phenomenon aligned?

Thanks!

Ethan Wen

over 1 year ago

0 Sasikala Thangam over 1 year ago

TI__Expert 8195 points

Hi Ethan,

All the IO pins should be powered after its corresponding side power supply pin is powered. Please refer the following FAQ

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1375076/faq-ucc21750-q1-isolated-gate-drivers-power-up-sequence/5267106?tisearch=e2e-sitesearch&keymatch=gate%20driver%20power%20up%20sequence#5267106

If IO pins are powered externally with different supply and if it is powered before VCC - it will violate the absmax condition as explained in the article.

So, please pull the IO lines only to VCC- not to external bias to avoid in the test scenario.

Thanks

Sasi

0 Chuqiang Wen over 1 year ago in reply to Sasikala Thangam

TI__Expert 5865 points

Hi Sasi,

Thanks for your support.

I understood for the second question. Could you please also check the first question?

Chuqiang Wen said:
1. VCC short to GND

When VCC short to GND, RDY pin will be pulled down for 2us, then RDY will go back to logic high.

Thanks!

Ethan Wen

0 Sasikala Thangam over 1 year ago in reply to Chuqiang Wen

TI__Expert 8195 points

When VCC is short to GND - it will not cause RDY to go high until VCC is high.

In the customer system, all IO pins are externally biased, so even though VCC is short, the device may power through IO pins, which is not recommended and it is violating the abs max condition.

So please ask customer not to plan external bias for IO pins, and the IO pins need to be pulled to VCC.

Hope it helps

thanks

Sasi

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UCC21750-Q1: VCC open and short case