TPS3430-Q1: Start timing of WD first pulse count down

Hi Kuramochi-san,

Section 7.4.3 outlines that when WD=Enable at power-up the watchdog timing begins after VDD>VDD(min) and tRST has expired. The tRST time begins once VDD>VDD(min) and is a programmed time based off of the CRST pin value

Thanks,
Joshua

Hi Joshua-san, 

Sorry for asking you but I'd like to make sure.

When should we start to count down of tRST expire? VDD1/2min(1.6V) or VPOR?

Also, Timing Diagram as "X" duration. Does this mean tRST?

Best regards,
Kazuki Kuramochi

Hi Joshua-san,

Sorry for my late reply and I'd like to make sure about following your answer.
"You should start the count down of tRST expire at VDD1/2min(1.6V)."

Does it mean this device sensing VDD voltage becoming 1.6V?

I worried about slow ramp-up case at VDD.
This device's don't have requirement for VDD ramp-up slew rate min.
It mean that there is possibility that changing voltage from POR to VDDmin(1.6V) may occur by very long time as like as longer than tRST. 
Then, I'd like to make sure about behavior of device under such a condition.

Best regards,
Kazuki Kuramochi

Hi Joshua,

I just want to know about the expected behavior.

Any way I understand that there isn't any monitoring function for detecting VDD reach 1.6V and WD start timing of WD should be occur from POR but we cannot guaranty.

Best regards,
Kazuki Kuramochi