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TPS3808: when i touch the reset_l (pin 1) of the device with a bus wire, it will cause the signal to drop below 2V and then rise up

Part Number: TPS3808

Tool/software:

When I touch the FPGA_RESET_L with a bus wire, or a DVM probe, it will cause the signal to go down sharply and gradually rises up.

I probed MR_L while touching the reset_l with a wire, there is nothing on MR_L

P3V3A is also stable. 

I put a 0.1uf on C524 and it doesn't help.

Have you seen anything like that? If I use a scope probe on reset_l, it's ok. I don't see this pulse. Only when I use a DVM meter probe or a jumper wire (AWG28), this happens.

  • Hi Jun, 

    Thanks for your question.  DVM meter probe shouldn't be causing any reset assertion if you just measuring the reset output. Please check your set up once more.

    I want you to know that in the datasheet we are recommending that the pullup resistor to be no smaller than 10 kΩ. I recommend increase the resistor value and check if you still see the reset assertion.

    - > If you keep still seeing the same issue, I will need more information. Please find them in below: 

    Please share how you connecting the DMV and wire so that  I can visually better understand your case.

    Please let me know how long does it the reset pin take to gradually rises up to VDD?

    - Is it the same even if you use DVM meter probe and jumper wire? 

    Best,

    Sila Atalar 

  • the rise time to go back to 3.3V varies as it sometimes drops to 0 and sometimes drops to 1V.  Not sure if it's my probe or something else. 

    Me and my coworkers independently tried and we saw the same results. 

    We did try 10K pull up and that doesn't help.

    I don't know what else to tell you about DVM probe or wire.  DVM is not even on. 

  • we put a 1nf cap between pin 1 and 2 and that solves the issue. We also noticed that this chip is placed fairly close to the switcher. the U75 is on top, and the big inductor on the north is on the bottom side.  We suspect the probe wire probably pick up some switching noise. Likewise, I changed the pullup resistor on pin1 to 1K, and it also solves the issue.  So now my question is if my pullup also goes to 3.3V, same as the one for the TPS3808 VDD, is it ok to have a pull up resistor less than 10K.  From DS, I see TPS3808 reset_l has internal pulldown about 100 ohm. This is enough to over power my 1K pullup. I measured the reset_l asserted. It's 0.255V

  • Hi Jun, 

    Thanks for letting me know on your layout, and placing 1 nF cap fix the issue. When you test 1K Ohm resistor, do you still have the 1nF cap? 

    Best,

    Sila 

  • No, I don't. 

  • Thanks for letting me know on your test procedure. I will check with my team on this and get back to you by the end on Wednesday (pacific time)

    Best,

    Sila 

  • Hi Jun,

    Since the pull up resistor is highlighted as 10k, and in your case keeping  a 1 nF cap fix your issue, I think you should go with the recommended resistor value due to the current tolerance for RESET pin. My concern is even if you are pulling up to 3.3V, 1k Ohm may damage the device if is there any spike.

    Recommended current for Reset pin is 5 mA

    Best,

    Sila

  • Hi, Sila,

    adding a cap is a board spin. Changing pullup is a BOM change. So naturally, a bom change is a preferred solution.  

    I see reset pin can sink 5mA, right? so 1K pullup to 3.3V is 3.3mA, that should be ok.

  • Hi Hun,

    Yes, it can sink 5 mA. 

    Best,

    Sila