TPS548A28: Why is the PGOOD signal of TPS548A28 still pulled high when Vin is not equal to 0V ?

Hello, 

"Vin is not equal to 0V, VCC=0V, Ven=0V, and PGOOD pulled up to 3.3V through a 10-kΩ resistor, Vpgood is still equal to 850mV."

The PGood remains at the low level clamp voltage of 850 mV until the PG reaches the turning on threshold when FB is 92%. Which you can see the green waveform drop from the low level clamp to 850 mV to 0 and then rise to 3.3 V when the Vout has reached regulation. 

Best,
Ryan

According to the test results, when the EN signal becomes high, the PGOOD changes from 850mV to 0V immediately. However, when Vin is not equal to 0V, the PGOOD is still 850mV, which is inconsistent with the description of the data sheet. What caused this?

Hello, 

850 mV is the low level clamp voltage for PGOOD. PGOOD is awaiting the EN signal it will be clamped at 850 mV as long as there is VCC or VIN powering the device. The minimum value for VCC for PGOOD output is 1.5 V, so there will need to be VIN for it to be in low level clamp. 

Best,
Ryan

After our tests, we found that Vpgood can be clamped at 0V when providing VCC input to 548A28 before the EN signal is valid.   Now we have the following three questions:
1.   Is there any requirement for the power sequencing of VCC, VIN and Ven?
2.   Is the minimum threshold for VCC to work effectively 2.87V or 3.13V?
3.   According to the previous design, does the VCC need a diode in series?

Hi Nick, 

1) Yes, the datasheet has the power up sequence for internal and external VCC. 

2) If using external VCC, it should be applied before VIN and EN. The minimum threshold for VCC is 2.87 V (this is the UVLO rising threshold), but the minimum recommended value for VCC is 3.13 V. 

3) VCC does not require a diode in series. But it does require a 2.2 uF at least 6.3 V rated ceramic capacitor. 

Best,

Ryan

According to the description of the data sheet, the power on time of VCC only needs to be earlier than VIN or EN. In our design, is it necessary for VCC power on time to be earlier than both VIN and EN?

Hi Nick, 

Are you using external VCC? If so, then it would be easier to have it applied before VIN and EN reach the rising threshold. This is to ensure that the device uses the external VCC. The external VCC should come in before the EN signal. You could have the sequence to be VIN, VCC, EN, but that gives you a smaller window of time. The VCC would need to be active during the red circle of time window. Or the VCC could just be powered on before VIN and EN and not have to worry about implementing it in between VIN and EN. 

Best,
Ryan

Because VIN is the power input of the entire board, it is definitely the earliest to be powered on. But our design controls the power on time of EN, which will be about 40ms later than the power on time of VCC. Is this design feasible?