• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 2 answers
  • Subscribers 63 subscribers
  • Views 294 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ25303J: Typical Application circuit from datasheet

Maria Senyer
Prodigy 60 points
Part Number: BQ25303J

Tool/software:

Dear folk(s),

I am designing a new device and I want to include the BQ25303J in it.

My device will have a 3.7V 1-cell Li-Po battery, and will be charged from a USB. So, the BQ25303J comes handy for the battery charging purpose.

The thing is, I want the following behaviour :

- If no USB is attached, the system is powered by the battery

- If USB is attached, the USB must charge the battery AND power the circuit. The battery must only be charged in this case.

So, looking at the datasheet for the BQ25303J (https://www.ti.com/lit/ds/symlink/bq25303j.pdf?ts=1727334519693&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FBQ25303J) I found on page 26, section 10.2.2 Typical Application with External Power Path. It looks just like what I want.

The problem is, when looking at this design, I am wondering, how does this work? Is the PFET Q4 properly connected?

I assume the voltage at PMID (VSYS) is 5V when USB is connected and is floating when USB is not connected.

Let's check Vgs for each case and see if the mosfet is ON or not

USB Connected

Vgs = Vg - Vs = (5V - 0.7) - (VPMID) = 4.3V - 5V = -0.7 V MOSFET NOT ON The voltage provided to the circuit is the voltage from the USB.

USB NOT Connected

Vgs = Vg - Vs = 0V - (floating) = ??? Then, here maybe the VSYS sees the voltage on the battery because of the diode on Q4. In that case, assuming the battery has its nominal voltage 3.7V:

Vgs = Vg - Vs = 0V - 3.7 = -3.7V --> THE MOSFET IS ON

But here now, what I don't understand is, the current on a PMOS flows from source to drain, right? In this case, this would mean from VSYS to Battery, but this is exactly the opposite of what we want.

If anyone could clarify this to me, I would be so grateful.

Cheers.

  • 0
    TI__Mastermind 31120 points

    Hi Maria, 

    Thank you for reaching out via E2E. Please see my comments below. 

    Firstly, for the typical application with external power path diagram shown on page 26 please connect VSYS (i.e. system output) directly to VBUS pin rather than at PMID pin. We are in the process of getting the diagram corrected for the next revision of the datasheet. 

    Maria Senyer said:
    I am wondering, how does this work? Is the PFET Q4 properly connected?

    As you mention with USB connected VBUS voltage at gate will have PFET open/off. VSYS is directly powered from USB and not the battery. 

    For USB not connected case current will be able to flow from battery to VSYS when VBUS is removed with PMOS configured how it is in the diagram. The PMOS FET will conduct in either direction when Vgs is below voltage threshold. The PFET is connected in this way to prevent current flow from VBUS to BAT through Q4 body diode when USB is connected. 

    Best Regards,

    Garrett 

  • 0 in reply to Garrett Kreger
    Prodigy 60 points

    Hi Garret,

    Thank you for your answer.

    You suggest that I connect VSYS directly to VBUS pin rather than at PMID pin. I tought PMID pin's function was to protect the circuit against reverse polarity. Why is it a bad decision to connect VSYS to PMID pin?

    Also, thank you for the clarification of the PFET working mode, I understand it now.

    Best wishes,

    Maria

  • 0 in reply to Maria Senyer
    TI__Mastermind 31120 points

    Hi Maria, 

    Please see my comments below. 

    On BQ25303J absolute maximum voltage rating of VBUS input pin is -2V to 28V (listed in datasheet section 8.1). The device is not designed to protect against an input supply connected with reverse polarity.

    The primary purpose of PMID pin is to allow the connection of the required input capacitor as close as possible to the input of the buck converter circuit. 

    Maria Senyer said:
    Why is it a bad decision to connect VSYS to PMID pin?

    The BQ25303J will sometimes have issue properly detecting an input unplug when there is a large enough load connected at PMID. Due to this we  recommend no system load be connected to PMID pin. 

    One alternative IC option to the BQ25303J I wanted to point out is the BQ25616J. The key difference is BQ25616J already has power path management built into the IC. This would eliminate the need for external Q4 PFET. 

    Best Regards,

    Garrett

  • 0 in reply to Garrett Kreger
    Prodigy 60 points

    Hi Garret,

    Thank you for such a detailed explanation.

    I will consider changing my design to include the BQ25616J instead of the BQ25303J. I need to take a careful look to the datasheet and see how to include it properly. I need a few days to do so.

    If you don't mind, I will not close this issue yet, just in case I need some assistance with this change in my design. You already know my case and I feel comfortable asking you any further questions.

    Thank you for your support.

    Kind regards,

    Maria

  • 0 in reply to Maria Senyer
    TI__Mastermind 31120 points

    Hi Maria, 

    Sounds good. Any additional questions can be asked in this thread. 

    Best Regards,

    Garrett