BQ40Z50-R2: BTP_INT

Hi Kagawa,

Yoshinobu Kagawa said:

1)  Please provide information on the buffer configuration of BTP_INT.
     (power supply, resistor values, etc. for internal pull-ups of BTP_INT)

Can you go more in depth about what is meant by buffer configuration? Are you asking about the internal connections of the pin?

Yoshinobu Kagawa said:

 Please inform us of the maximum output voltage of BTP_INT.

I believe the maximum should be 6V.

Yoshinobu Kagawa said:

3)  Please explain the following points regarding the external pull-up of BTP_INT.
     - Power source to be used
     - Restrictions on pull-up resistor values
       (See the yellow portion of the figure below on p. 25 of the bq40z50 data sheet.)

I think the purpose of this section is based on the different voltages that can be output by BTP_INT seen below. The pull-up resistor value and power source attached will be based on the host receiving the signal:

Yoshinobu Kagawa said:

4) Please explain the meaning of Ro (Output reverse resistance) and specifically which part of the resistance is indicated.

This resistance is the resistance measured between the pins listed. This should always be higher than 8kOhms.

Yoshinobu Kagawa said:

Am I correct in understanding that the PBI pin normally outputs the same voltage as the BAT power supply?
    As background, we have just applied BAT power to a bq40z50 evaluation board and have confirmed that the PBI has the same voltage as the BAT power supply.

The PBI pin is supposed to be used as a power supply backup, I believe this should be the same as the BAT pin.

Regards,

Anthony

Hi Anthony-san,

Can you go more in depth about what is meant by buffer configuration? Are you asking about the internal connections of the pin?
-->
Yes, I'm asking about the internal connection of the pin.

Regards,
Kagawa

Hi Kagawa,

This pin is the same type as the PRES and DISP pin, which follow the diagram below:

Regards,

Anthony

Hi Anthony-san,

1) In the diagram of the BTP_INT buffer configuration that you replied to the other day, it appears to be an open-drain output of the PBI terminal voltage, but when I actually checked the waveform of TP12 on the bq40z50EVM, this was not the case, and approximately 4.6V was being output.
In this configuration, the voltage of a 2S battery is divided according to Figure 1-3. Resistor Divider Network of SLUA999 (A simple Battery Simulator) and input to the J2 and J5 terminals of the EVM.
I have attached the waveforms so I would appreciate your opinion on the reason for this.



2) In the above waveform, immediately after powering on the bq40z50EVM, the voltage on the PBI terminal is lower than the voltage on PACK+.
This seems to contradict your previous answer, "The PBI terminal and the BAT terminal should be at the same voltage." Can you explain the reason for this?

Regards,
Kagawa

Hi Kagawa,

Yoshinobu Kagawa said:

In the diagram of the BTP_INT buffer configuration that you replied to the other day, it appears to be an open-drain output of the PBI terminal voltage, but when I actually checked the waveform of TP12 on the bq40z50EVM, this was not the case, and approximately 4.6V was being output.
In this configuration, the voltage of a 2S battery is divided according to Figure 1-3. Resistor Divider Network of SLUA999 (A simple Battery Simulator) and input to the J2 and J5 terminals of the EVM.

I have confirmed with our hardware team that this is a push/pull pin.

Yoshinobu Kagawa said:

In the above waveform, immediately after powering on the bq40z50EVM, the voltage on the PBI terminal is lower than the voltage on PACK+.
This seems to contradict your previous answer, "The PBI terminal and the BAT terminal should be at the same voltage." Can you explain the reason for this?

From the waveform, the difference between BAT and PBI seems to be ~300mV, which I believe is normal. This decrease may be being produced by the internal function of the gauge.

Regards,

Anthony

Hi Anthony-san,

If the BTP_INT pin is a push-pull type, then a 10kΩ pull-up resistor from PBI should not be needed.
However, I am unclear why this configuration is considered equivalent to a “high voltage GPIO”. Please explain the following two points.

1. The timing at which RHOEN and RHOUT switch in the “High-Voltage GPIO” shown below.
2. If an external pull-up resistor is required for the BTP_INT pin, what is its resistance value and voltage?

Please explain the following points

1. The criterion of 300mV voltage difference between BAT and PBI as normal
2. specifics of “internal function of the gauge

When using bq27542-g1 in our past models, the following registers were used to determine the battery safety status.
What registers and bits correspond to these in bq40z50 for 2S1P battery?

<Registers used to determine the safety status in bq27542-g1:>
1. SafetyStatus(): 0x1A and 0x1B
ISD, TDD, OTC, OTD, OVP, UVP

2. Flags(): 0x0A and 0x0B
BATHI, BATLOW, CHG_INH, IMAX

Regards,
Kagawa

Hello Kagawa,

Anthony is currently out of office. He should get back to you next week.

Regards,

Adrian

Hi Kagawa,

Yoshinobu Kagawa said:

The timing at which RHOEN and RHOUT switch in the “High-Voltage GPIO” shown below.

Please allow me to confirm this with our design team.

Yoshinobu Kagawa said:

2. If an external pull-up resistor is required for the BTP_INT pin, what is its resistance value and voltage?

I believe these values would rely on the application and host that is receiving the signal.

Yoshinobu Kagawa said:

1. The criterion of 300mV voltage difference between BAT and PBI as normal
2. specifics of “internal function of the gauge

Please allow me to confirm this with our design team.

Yoshinobu Kagawa said:

What registers and bits correspond to these in bq40z50 for 2S1P battery?

<Registers used to determine the safety status in bq27542-g1:>
1. SafetyStatus(): 0x1A and 0x1B
ISD, TDD, OTC, OTD, OVP, UVP

2. Flags(): 0x0A and 0x0B
BATHI, BATLOW, CHG_INH, IMAX

1. The gauge protection bits can be found in SafetyStatus for this device as well (register 0x0051).

2. For this device, I do not believe it is possible to produce an interrupt using the same conditions of the BATHI and BATLOW. For CHG_INH, I do not believe the gauge has a protection for temperature when a load is not applied, however there are Overtemperature and Undertemperature protections that could be used here. I do not believe that this gauge has the same Imax functionality as well.

Regards,

Anthony

Hi Anthony-san,

It is my understanding that the correspondence between bq27542-g1 and the register that detects the safety status of bq40z50 is the following relationship. Please confirm that this understanding is correct. If it is incorrect, please provide the register in bq40z50 that corresponds to bq27542-g1.



Regards,
Kagawa

Hi Kagawa,

Yoshinobu Kagawa said:

It is my understanding that the correspondence between bq27542-g1 and the register that detects the safety status of bq40z50 is the following relationship. Please confirm that this understanding is correct. If it is incorrect, please provide the register in bq40z50 that corresponds to bq27542-g1.

I believe your understanding of the correlations between these registers are correct, however the triggering of these situations on bq40z50 will not produce an interrupt like so on the bq27542.

Yoshinobu Kagawa said:

1. The timing at which RHOEN and RHOUT switch in the “High-Voltage GPIO” shown below.

Response from our design team:

"The switching times are all slow speed, but there's no concern regarding an overlap period in the design."

Regarding the ~300mV difference on BAT compared to PBI, is there currently a diode in series with the BAT pin in this design?

Regards,

Anthony

Hi Anthony-san,

This measurement result was obtained with the bq40z50EVM evaluation board.
In the bq40z50EVM circuit diagram, the internal connection of the PBI and BAT terminals is unclear.
Could you provide a connection diagram of the PBI and BAT terminals?
In addition, regarding the "internal function of the gauge" mentioned, if there is a possibility that a potential difference between the BAT and PBI terminals may be generated, please tell us the function, register setting value, etc.



Regards,
Kagawa

Hi Kagawa,

Yoshinobu Kagawa said:

Could you provide a connection diagram of the PBI and BAT terminals?

Below is the Power Supply Control Diagram from the datasheet:

Yoshinobu Kagawa said:

In addition, regarding the "internal function of the gauge" mentioned, if there is a possibility that a potential difference between the BAT and PBI terminals may be generated, please tell us the function, register setting value, etc.

I was corrected by our design team that the voltage drop could be caused by the diode in series with the BAT pin, and that the internal function of the gauge should produce the same voltage at each of these pins. Please allow me to get more clarification from them.

Regards,

Anthony 

Hi Anthony-san,

I believe that when the BTP_INT pin is open, the voltage at the HIGH output of the BTP_INT pin is equivalent to the PBI output voltage as shown in the diagram below.
As per my previous question, a potential difference (300mV) is created, what is the reason for this?



Regards,
Kagawa

Hi Kagawa,

The information I have received from the design team is that this difference could be coming from the diode in series with the BAT pin. Typically the voltage directly received by the BAT pin should be the same as the PBI. Please let us know if this difference has been seen on multiple devices.

Regards,

Anthony