TPS43060: FET control

Hello Dice-K,

Thanks for reaching out to us via e2e.

- The switching frequency is correct. See green lines in the attached image

- When you measure the HDRV pin to GND, you will see the switch node voltage (orange dotted line) and - added on top - the actual gate driver output voltage (7.5V)
Obviously, on your board, the H-Side FET is not turned on.

- As you mentioned, one reason could be that the high-side driver has no supply because the bootstrap circuit is not functioning.
Is the diode populated in the right direction?
Which voltage do you measure across the bootstrap capacitor?

- Otherwise, the controller is broken. There is no condition where the HDRV output remains off although the LDRV was on.
When the part is skipping cycles, the LDRV will also stay off.

- So, chances are high that the controller is broken.
In your screenshots, it is visible that the Abs Max ratings get violated a lot.
While the HS gate driver does not turn on, the HDRV voltage will follow the Switch Node voltage.
In the red circles you can see the ringing / the undershoots, where SW goes below 0V.
I wonder why the undershoots are not seen in the orange circle as well. Obviously, you are using a different probe or different filter settings on the oscilloscope.
You can see that on your boars the undershoots are much bigger.

- As per the datasheet:
Transient voltage (10 ns max): SW –2V The Undershoot of the SW voltage must not exceed -2V
BOOT, HDRV voltage with respect to SW pin 8 V The voltage on the bootstrap capacitor must not exceed 8V

The bootstrap capacitor voltage is composed in the following way: VCC voltage (7.5V) minus a diode drop (0.7V) plus the undershoot when SW goes below 0V (maybe 8V or 10V on your board).
So, when that undershoot is big, the bootstrap capacitor can easily get charged to a voltage above the 8V limit (maybe 15V peak).

- These big undershoots in the red circles will most likely damage the controller.
Please reduce them by adding gate resistors and maybe a snubber to your circuit.
Also, a good layout with very solid GND connections, short paths and NO thermal relief connections is very important.
Please follow the layout guidelines in the datasheet.

- Even if the High-side FET does not turn on, the current will go across the body diode of the high-side FET.
The voltage regulation will compensate for the higher voltage-drop. Therefore the output voltage itself is as expected.

- Every second cycle the on-time of the low-side FET is very short (purple circles), so it appears as if the L-Side FET was outputting H at an unexpected time.
Such short cycles will happen because of an overcurrent event.
Maybe, because the high-side FET did not turn on, there is a lot of energy left in the inductor from the previous cycle and therefore the next cycle gets terminated right at the beginning.

- I wonder why the duty cycles differ so much between the EVM and your board.
Are the two setups using different input voltages?
Probably your hardware constellation is also different (inductor, sense resistor, etc.)

Best regards
Harry