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TPS25947EVM: FLTb pin of the TPS259470A is falling after power input

Part Number: TPS25947EVM
Other Parts Discussed in Thread: BQ25798, BQ25798EVM

Tool/software:

We are considering a configuration in which the TPS25947EVM is placed in front of the input of the BQ25798EVM in order to control whether the power input from the host MCU to the BQ25798 is permitted or prohibited.
Specifically, the BQ25798EVM is assembled in the configuration shown in Figure 9-2, Single Input Connected to VBUS Directly Without ACFET-RBFET, on page 31 of the datasheet, and an eFuse (TPS259470A ) is placed on the VIN1 input side of the BQ25798EVM.
However, the FLTb pin of the TPS259470A is falling after power input, and we are having difficulty finding the cause.
Note that the input power source is not in an overvoltage/constant voltage/overcurrent state.
Also, disconnecting the VBUS line of the BQ25798 and the VOUT of the TPS25947EVM will stop this phenomenon from occurring.
Any ideas as to why FLTb falls off after power input?

<Configuration of the actual machine>
TPS25947EVM:
- OVLO voltage: 15.38V detection, 13.97V return
- OVLO voltage: 15.38V detected, 13.97V released
- ILIM resistor: 3kΩ (input current limited at 1.11A)



<Block Diagram>


<Current problems>
- The _FLT pin drops momentarily after power is input.
- Input power is below the OVLO/UVLO/ILIM threshold.
- The problem is solved by disconnecting the VBUS line (VIN1 pin) of BQ25798EVM and the VOUT pin of TPS25947EVM.

<Measurement waveform>


<Expanded figure of measured waveform>


I have the same question about BQ25798.
Please see the end of the thread below.

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1418808/bq25798-esd-protection-for-ts-line/5467827#5467827

Regards,
Kagawa

  • Hi Kagawa san,

    I will get back to you on this before Wednesday eod.

    Best Regards,
    Arush

  • Hi Arush-san,

    What is the situation ?

    Regards,
    Kagawa

  • Hi Kagawa-san,

    I think only two reasons can cause this,

    1. overcurrent
    2. reverse current event

    Here, I don't see vout of eFuse greater than DC12V so reverse current event is less likely. I think there might be some spike of overcurrent causing this issue.

    Can you use some cap at Itimer pin to keep some blanking timer. That should prevent FLTb to go low when the false overcurrent event happens.

    What is the peak current value in this waveform.

    Best Regards,
    Arush 

  • Hi Arush-san,

    Regarding your questions about the current values i) and ii), we have measured the current values.

    The current waveforms of the DC+12V line for i) and ii) as you indicated are shown below.
    Measurement conditions:
    1. RILM resistance of TPS259470A: changed from 3KΩ to 560Ω
    2. eFuse ILIM calculated value: 1.11A → 5.954A
    3. between ITIMER pin and GND: 0.1uF capacitor mounted

    Results:
    1. The FLT pin sometimes falls to the LOW level with no improvement.
    2. Even though there is no reverse current in the current waveform and the flowing current is lower than the overcurrent limit set by the ILIM pin, I cannot understand why the FLTb pin falls to the LOW level.
    3. This phenomenon does not occur when the VBUS line of the BQ25798 is disconnected from the OUT pin of the TPS259470A.

    Questions:
    1. are there any additional terminals that should be monitored?
    2. are there any other possible causes for the FLTb pin to drop after power input?
    We do not believe that overcurrent is the cause.

    i) DC+12V current value when DCJACK_SLOT1_PG (FLTb pin) goes LOW level for the first time ...150mA


    ii) DC+12V current value when DCJACK_SLOT2_PG (FLTb pin) goes LOW level for the first time ...154mA


    <Circuit diagram and waveform measurement position>


    Regards,
    Kagawa

  • Hi Kagawa-san,

    Can we just probe itimer pin once to check if its voltage. This will us to confirm if there is any overcurrent event happening or not. Itimer will start to discharge when any overcurrent event happens.

    Can we also place a diode between the eFuse and the BQ device rail just for evaluation to check if this is preventing the issue. Diode will block the reverse current so we can be fully sure during the testing.

    This is the FLTb table and I don't think any other issue will cause FLTb to go low.

    Best Regards,
    Arush

  • Hi Kagawa-san,

    Here are some more points which we can do here.

    • Can you increase the BQ25798 device input cap and check if this resolves this issue
    • Add deglitch circuitry at FLTb pin of eFuse to prevent false trips

    PG pin and FLTb pin are both open drain so this example is valid

    Best Regards,
    Arush

  • Hi Arush-san,

    ・I checked the waveform of the ITIMER pin, and the ITIMER pin voltage does not drop even when the FLTb pin is at a LOW level, so it is not considered to be in an overcurrent state.
    ・I understand that the FLTb pin is a function to determine the power supply status of the output side, but does the TPS259470A have a specification that causes a false detection of the FLTb status even if there is no problem with the output power supply status?
    ・Other than adding an external circuit, is it effective to add a standby time on the MCU(Mirco Controller Unit) side?
    If valid, please give your opinion on how much wait time should be set for the false trip time of the FLTb state.

    1. the waveform when the ITIMER pin is probed is shown below.



    Enlarged measurement waveform:


    <Measurement position of ITIMER1 and ITIMER2>


    Regards,
    Kagawa

  • Hi Kagawa-san,

    Yes, it looks like this is not due to overcurrent. Most likely cause will be reverse current. The reverse current blocking starts with only -30mV threshold so it is difficult to check on waveforms. 

    Did you try this? 

    Can you increase the BQ25798 device input cap and check if this resolves this issue

    Coming back to your questions

    Other than adding an external circuit, is it effective to add a standby time on the MCU(Mirco Controller Unit) side?
    If valid, please give your opinion on how much wait time should be set for the false trip time of the FLTb state.

    This will depend on the application. I think you are seeing around 2-3ms of false FLTb low so keeping standby time to 5ms or something similar should be good. Keep it less than 110ms (retry time of device). 

    Best Regards,
    Arush