LM5137F-Q1: Schematic review

Hi Che Wen,

Here are some comments on the quickstart file:

1. The shunt resistor of 2mΩ seems low, giving a high current limit of 26A. Typically we set the current limit at 130-160% of full load, so consider using 3-4mΩ instead. This is important as it affects compensation as well.
2. 1uH is a bit low, giving 55% ripple current. I actually use 1uH in the EVM, but this is rated for 20A per output.
3. Enter the derated value for ceramic Cout in the file, as this determines the compensation components. For example, a 47uF cap may only be 25uF at 5VDC.

In terms of the schematic:

1. Remove the low-side FET gate resistors (we need strong pulldown to prevent Cdv/dt induced shoot-through).
2. The resistors in series with ISNS1/2+ need to be > 249Ω (otherwise it mayfail pin check algorithm at startup).
3. Check EVM values for EN resistors (need 10k in series).

Regards,

Tim

Hi Che Wen,

Here is one reference: https://www.electronicdesign.com/content/article/21188216/dv-dt-immunity-improved-in-synchronous-buck-converters

Regards,

Tim