Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.

  • State TI Thinks Resolved
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 64 subscribers
  • Views 60 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

Original question:

LM1084: LM1084-adj

LM1084: TTL Control of LM1084-adj

Richard Jenkins
Prodigy 20 points
Part Number: LM1084

Tool/software:

Relating to the earlier post on TTL control of LM1084-adj, with Vin=28V, and Vout=26V, when I sink current from ADJ by grounding it, the output (Vout) drops to 17V. With these input and output voltages, how do I turn off / on the 26V output pin ? 

  • 0
    TI__Expert 5230 points

    Hi Richard,

    If the TTL is implemented correctly as per the schematic shown in Fig 7-3, when the TTL logic is pulled high, the NPN transistor is activated and the part is disabled, outputting approximately 1.25 V. If the TTL logic is pulled low, the NPN transistor is unbiased and the regulator functions normally. If you are seeing a 17V output instead of 1.25V when ADJ is grounded, it could likely indicate an error with how TTL is implemented. Please send me a schematic of your implementation so I can debug the issue further.

    Best Regards

  • 0 in reply to Ishaan Shetye
    Prodigy 20 points

    /resized-image/__size/320x240/__key/communityserver-discussions-components-files/196/pastedimage1730747595153v2.png

    See attached image of schematic, I apply volts at one end of R37, up to 15V, but the output of U5 (the LM1084-ADJ) is not changing. As mentioned in my previous email, some voltage does drop when the ADJ is grounded but not to 0V.

    Please help debug this.

    Thanks

  • 0 in reply to Richard Jenkins
    Prodigy 20 points

    Apologies correction: When I apply over 5V, to the 1k resistor (R37) the voltage on the ADJ pin does drop to zero, same effect as grounding that pin, however the Vout voltage drops to no less than 15V.

  • 0 in reply to Richard Jenkins
    Prodigy 20 points

    Hi Ishaan, Have you had a chance to look at the schematic? Do you have a direct contact to discuss further? Thanks

  • 0 in reply to Richard Jenkins
    TI__Expert 5230 points

    Hi Richard,

    Could you please send a clearer schematic which shows the circuit to the right of C16? What is connected to Vout (24V)? The snip you sent is very small and blurry.

    I have a few steps which will help us debug the circuit:

    • First DNP Q1-B so that the LDO is always ON. Then measure Vout to verify that it is 26V as expected. Short ADJ to GND with a jumper and confirm if Vout drops to 0-V. This will confirm if the device itself works as expected and then we can focus on debugging the TTL. 
    • When Q1-B is on (when 5V is applied to R37), ADJ should be 0-V and Vout should be 1.25V because in the Vout formula, the effective R2 is 0 Ohms. The only reasons why Vout is a different voltage are: a) The device is damaged or Vref has drifted b) The effective resistance R2 is not 0-V and c)There is external bias at Vout which is clamping this voltage to 15V in U5 OFF condition
    • What is the ESR of C7?

    Best Regards

    Ishaan