Tool/software:
Hi Everyone,
I need a help
I am using LM5069 for hot swapping 50V to load to sustain in the interruption test I kept a bulk capacitor to dis-charge in the interruption for 50ms.
Interrupt test: 50ms interrupt with a 500ms gap it will repeat for 5 times fault is triggered in a 3cycle timer pin reaching 4V gradually, In 1st cycle CT voltage is 2V and 2nd cycle 3V and 3rd cycle 4V.
during this time load of 4Amps connected in the output.
Request your support for the below listed queries.
Our application requirement is when input power supply 50V and output is connected with 7A load and pre-charged back up capacitor (12mF) need to source the 250W load requirement during interrupt . Refer the attachment for more detail.
Test condition LDC201 test 50ms interrupt with 500ms gap repeated for 5 cycles: In first cycle, timer capacitor slightly rising the voltage and third cycle third interrupt timer capacitor reached 4V.
Timer capacitor reached 4V fault triggered ,so that capacitor(12mF) is not charged. During interrupt can you explain why timer capacitor slightly increasing voltage and reached 4V.
Request to verify our design below and share your comments .
During Fault condition waveform in timer capacitor.
