Tool/software:
Hi
I am curious is INTERNAL LDO (VCC PIN) is trigger by enabl pin ?
Does enable low will cause Pgood "clamp" ? becuae Vcc is not enable, even vin is powered.
Is ther any other buck solution like TPS548A28 , internal LDO (Vcc) is trigger by enable pin , and setting enable low cause with PG clamp function
Hi Dimitry,
Yes, internal LDO (VCC) is triggered by the EN pin. Page 14 of the datasheet it shows a start-up procedure.
Enable low will just have PG go low to 0V if using internal VCC.
Other buck devices will also have PG go low when EN is low.
Best,
Ryan
hi
Enable low will just have PG go low to 0V if using internal VCC.
--> My design is using internal VCC , during Enable low status, PG is in clmap status.
Am I right ?
Hi Dimitry,
PG will go low when EN is low using internal VCC
C1 is VIN, C3 is EN, C4 is PG.
Best,
Ryan
Hi Dimitry,
PG clamp voltage occurs when there is voltage on VCC.
The waveform looks like this when using external VCC as it is high, so PG is clamped. Once EN is high the device doesn't immediately have vout, so PG gets pulled low. Once Vout reaches the threshold, PG will get pulled high.
If PG uses internal VCC, there is no voltage on VCC until EN is high which causes VCC to startup. Once VCC is started up, there PG gets clamped.
After En is high and PG gets clamped, Vout starts to ramp up and PG gets pulled low. Once Vout reaches past the threshold, PG goes high.
Best,
Ryan
