• State TI Thinks Resolved
  • Locked Locked
  • Replies 12 replies
  • Answers 3 answers
  • Subscribers 63 subscribers
  • Views 580 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCD9081: The minimum shutdown time between each EN pin

Yishan Chen
Intellectual 1950 points

Part Number: UCD9081

Tool/software:

Hi team,

What is the minimum shutdown time between two EN signal?

For example, when the Rail1 shut down, it will trigger Rail 2 shut down, what is the minimum time interval between the falling edge of rail1 and rail2?

Customer have tested the situation, they typical number is 800uS and it will oscillate from 600uS to 900uS, what is the range of this 'respond time'?

Other two questions is:

Could we help customer programming in our factory?

Do we have any indicator which can prove we have successfully updated the register from GUI?

Thank you,

Yishan Chen

  • 0
    TI__Genius 10060 points

    Hi, Yishan,

    1. The minimum time interval between rail 1 and rail 2 is 0 ms. Please refer to UCD9081 Advance Sequencing and Monitoring for detail.

    2. Please refer to UCD9081 Programming Guide for detail

    3. UCD9081 has checksum bytes at addresses 0xE1FE and 0xE1FF that can be use to verify the program. Please refer to section 3.4 in UCD9081 Programming Guide

    Regards

    Anne Ngo

  • 0 in reply to Anne Ngo77
    TI__Intellectual 1950 points

    Hi Anne，

    For the first question, We know the minimum time interval is 0ms, But in real test, if we set all delay to 0ms, it still have 800uS delay(Because of the chip process time?, ADC time?), the question is why we have 800uS delay and Could we short this delay?

    Thank you,

    Yishan Chen

  • 0 in reply to Yishan Chen
    TI__Intellectual 1950 points

    And I need find anything regarding 'Could we help customer programming in our factory?' in the programming guideline

  • 0 in reply to Yishan Chen
    TI__Genius 10060 points

    Hi, Yishan,

    Check rail delay time as well as rail dependencies for the delay.

    Regarding programming guide, the above document should provide information. I extract the information from the document here, FYI:

    ////////////////////////////////

    Use UCD9081 EVM GUI to configure device, then export the configuration to Intel Hex format file.

    • User_Data: 128 bytes, start at address 0x1080
    • Param_Data: 512 bytes, start at address 0xE000

    Assume device address is 0x6F

    Unlock Flash Memory

    Setup address for UserData section, based address 0x1080

    Unlock flash UserData section

    Write all 128 bytes of data, starting from address 0x1080, 32 bytes at a time

    for (int i = 0; i < 4; i++)

    {

                 // Setup the address

                 int address = 0x1080 + (32 * i);

                 byte [] write_data = new byte [] {(byte)(addr & 0xFF), (byte)((addr & 0xFF00) >> 8)};

                 I2C_Write (0x6F, 0x30, 2, write_data);

                 // Write data

                 byte [] buffer = new byte [32];

                for (int j = 0; j < 32; j++)

                        buffer[j] = user_data [32 * i + j];

                I2C_Write (0x6F, 0x32, 32, buffer);

    }

    Setup flash address for Params Section, based address 0xE000

    Unlock flash params section

    Write all 512 bytes of params_data, starting at 0xE000, 32 bytes at a time. Setup address for each write

    for (int i = 0; i < 16; i++)

    {

                 // Setup the address

                 int address = 0xE000 + (32 * i);

                 byte [] write_data = new byte [] {(byte)(addr & 0xFF), (byte)((addr & 0xFF00) >> 8)};

                 I2C_Write (0x6F, 0x30, 2, write_data);

                 // Write data

                 byte [] buffer = new byte [32];

                for (int j = 0; j < 32; j++)

                        buffer[j] = param_data [32 * i + j];

               I2C_Write (0x6F, 0x32, 32, buffer);

    }

    Lock Flash memory

    ///////////////////////////////

    Regrads

    Anne

  • 0 in reply to Anne Ngo77
    TI__Intellectual 1950 points

    Hi Anne,

    I don't think you answer my question for the "minimum time interval" Below is the setting of shutdown sequence, the rail 5 is the parent rail and the rail 1,3 and 4 will act after rail 5 shutdown.

    The red line is Rail 4 and yellow line is Rail 1(wrong mark in the figure)

    Customer have tested although we are already set the Rail 4 in to 0ms delay, but it still have 800uS delay, We want to know why still have the 800uS delay!!

    Yishan Chen

  • 0 in reply to Yishan Chen
    TI__Intellectual 1950 points

    Regarding the "Could we help customer programming in the factory"  means

    Could we program UCD9081 in our factory product line with customer desired configuration？？

    Could we help customer pre-program the UCD9081 and customer can direct use in their board without programing again?

  • 0 in reply to Yishan Chen
    TI__Genius 10060 points

    Hi, Yishan,

    Can you send the .par file, save using UCD9081 EVM GUI so we can have a look? And unfortunately, no, we cannot help pre-program customer configuration in production. However, there are many 3rd parties that can handle this tasks. 

    Regards

    Anne

  • 0 in reply to Anne Ngo77
    TI__Intellectual 1950 points

    Hi Anne,

    You can set in your UCD9081 EVM and tell me what is the minimum respond time between two rail. What is the short time interval that you can achieve.

    Thank you

    Yishan Chen

  • 0 in reply to Yishan Chen
    TI__Genius 10060 points

    Hi, Yishan,

    The time you mentioned above is glitch time, not minimum response time. Please refer to UCD9081 Advanced Sequencing and Monitoring for more detail.

    Regards

    Anne Ngo

  • 0 in reply to Anne Ngo77
    TI__Intellectual 1950 points

    Hi Anne,

    I already check this file before you told me we have these file.

    There are nothing in this file about the minimum time. Have you ever check the file and my question?

    Out of Reg time or glitch time already set to 0 in rail 5.

    The question is What is the minimum time interval for between 2 rails in shutdown sequence?

    What is the reason we have 800uS delay when customer already have the right setting?

    If not right, you can told us what is the right setting to short the time interval.

    You can directly told me what is the minimum time interval and then I can tell customer and all the thing is closed.

    Thank you

    Yishan Chen

  • 0 in reply to Yishan Chen
    TI__Genius 10060 points

    Hi, Yishan,

    Can you send the .par file, saved by UCD9081 EVM GUI so we can have a look? To save the .par file, click on File menu -> Save Configuration.

    Regards

    Anne

  • 0 in reply to Anne Ngo77
    TI__Intellectual 1950 points

    Hi Anne,

    Please check below PAR filehttps://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/196/0066.UCD9081-Parameters.par

    Thank you

    Yishan Chen